PC87309 datasheet(2/192 Pages) NSC

2 / 192 page

Highlights

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Features

100% compatibility with PnP requirements specified in

the “

Plug and Play ISA Specification”, PC97, ISA, EISA,

and MicroChannel architectures

A special PnP module that includes:

— Flexible IRQs, DMAs and base addresses that meet

the PnP requirements speciﬁed by Microsoft® in

their 1995 hardware design guide for Windows

® and

PnP ISA Revision 1.0A

— PnP ISA mode (with isolation mechanism – Wait for

Key state Motherboard PnP mode

A Floppy Disk Controller (FDC) that provides:

— A relocatable address that is referenced by an 11-bit

programmable register

— Software compatibility with the PC8477, which con-

tains a superset of the ﬂoppy disk controller func-

tions in the

µDP8473, the NEC µPD765A and the

N82077

— 7 IRQ channel options

— Three 8-bit DMA channel options

— 16-byte FIFO

— Burst and non-burst modes

— A new high-performance, on-chip, digital data sepa-

rator that does not require any external ﬁlter compo-

nents

— Support for standard 5.25" and 3.5" floppy disk

drives

— Perpendicular recording drive support

— Three-mode Floppy Disk Drive (FDD) support

— Full support for the IBM Tape Drive Register (TDR)

implementation of AT and PS/2 drive types

A Keyboard and mouse Controller (KBC) with:

— A relocatable address that is referenced by an 11-bit

programmable register, reported as a ﬁxed address

in resource data

— 7 IRQ options for the keyboard controller

— 7 IRQ options for the mouse controller

— An 8-bit microcontroller

— Software

compatibility

with

the

8042AH

and

PC87911 microcontrollers

— 2 KB of custom-designed program ROM

— 256 bytes of RAM for data

— Three programmable dedicated open drain I/O lines

for keyboard controller applications

— Asynchronous access to two data registers and one

status register during normal operation

— Support for both interrupt and polling

— 93 instructions

— An 8-bit timer/counter

— Support for binary and BCD arithmetic

— Operation at 8 MHz,12 MHz or 16 MHz (programma-

ble option)

— Customizing by using the PC87323VUL, which in-

cludes a RAM-based KBC, as a development plat-

form for keyboard controller code for the PC87309

Two UARTs that provide:

— Software compatibility with the 16550A and the 16450

— A relocatable address that is referenced by an 11-bit

programmable register

— 7 IRQ channel options

— Shadow register support for write-only bit monitoring

— UART data rates up to 1.5 Mbaud

An enhanced UART and Infrared (IR) interface on the

UART2 that supports:

— HP-SIR

— ASK-IR option of SHARP-IR

— DASK-IR option of SHARP-IR

— Consumer Remote Control circuitry

— A PnP compatible external transceiver

— Three 8-bit DMA options for the UART with Slow In-

frared support (UART2)

A bidirectional parallel port that includes:

— A relocatable address that is referenced by an 11-bit

programmable register

— Software or hardware control

— 7 IRQ channel options

— Three 8-bit DMA channel options

— Demand mode DMA support

— An Enhanced Parallel Port (EPP) that is compatible

with the new version EPP 1.9, and is IEEE 1284

compliant

— An Enhanced Parallel Port (EPP) that also supports

version EPP 1.7 of the Xircom speciﬁcation.

— Support for an Enhanced Parallel Port (EPP) as

mode 4 of the Extended Capabilities Port (ECP)

— An Extended Capabilities Port (ECP) that is IEEE

1284 compliant, including level 2

— Selection of internal pull-up or pull-down resistor for

Paper End (PE) pin

— Reduction of PCI bus utilization by supporting a de-

mand DMA mode mechanism and a DMA fairness

mechanism

— A protection circuit that prevents damage to the par-

allel port when a printer connected to it powers up or

is operated at high voltages

— Output buffers that can sink and source 14 mA

Enhanced Power Management (PM), including:

— Reduced current leakage from pins

— Low-power CMOS technology

— Ability to shut off clocks to all modules

Clock source:

— Source is a 48 MHz clock input signal.

General features include:

— Access to all conﬁguration registers is through an In-

dex and a Data register, which can be relocated

within the ISA I/O address space

— 100-pin Plastic Quad Flatpack (PQFP) package

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