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PC97307 数据表(PDF) 18 Page - National Semiconductor (TI) |
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PC97307 数据表(HTML) 18 Page - National Semiconductor (TI) |
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18 / 218 page ![]() 18 Signal/Pin Connection and Description www.national.com GPIO20 GPIO21 GPIO22 GPIO23 GPIO27-24 157 77, 158 159 160 76-73 General Purpose I/O Group 10 General Purpose I/O Signals 27-20 – General purpose I/O port 2 signals. GPIO27-24 are multiplexed with XD5-2, respectively. GPIO23 is multiplexed with RING. GPIO22 is multiplexed with POR. GPIO21 is multiplexed on pin 158 with IRSL2, IRSL0 and on pin 77 with IRSL2, SELCS and XD6. See “SuperI/O Configuration 2 Register, Index 22h” on page 35. GPIO20 is multiplexed with IRSL1. HDSEL 92 FDC Output Group 16 Head Select – This output signal determines which side of the FDD is accessed. Active low selects side 1, inactive selects side 0. ID0 ID1 ID2 ID3 79 78 or 157 158 70 UART2 Input Group 1 Identification – These ID signals identify the infrared transceiver for Plug and Play support. These pins are read after reset. ID0 is multiplexed on pin 79 with IRRX2 and IRSL0. ID1 is multiplexed on pin 78 with IRSL1 and XD7, or on pin 157 with GPIO20 and IRSL1. ID2 is multiplexed on pin 158 with GPIO21, IRSL2 and IRSL0. ID3 is multiplexed on pin 70 with XDRD. See Table 1-2 on page 23 for more information. INDEX 97 FDC Input Group 1 Index – This input signal indicates the beginning of an FDD track. INIT 117 Parallel Port I/O Group 13 Initialize – When this signal is active low, it causes the printer to be initialized. This signal is in TRI-STATE after a 1 is loaded into the corresponding control register bit. An external 4.7 K Ω pull-up resistor should be employed. IOCHRDY 32 ISA-Bus Output Group 22 I/O Channel Ready – This is the I/O channel ready open drain output signal. When IOCHRDY is driven low, the EPP extends the host cycle. IRQ1 IRQ5-3 IRQ12-6 IRQ15,14 36 39-37 47-41 49,48 ISA-Bus I/O Group 15 Interrupt Requests 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 14 and 15 – IRQ polarity and push-pull or open-drain output selection is software configurable by the logical device mapped to the IRQ line. Keyboard Controller (KBC) or Mouse interrupts can be configured by the Interrupt Request Type Select 0 register (index 71h) as either edge or level. The parallel port interrupt is either edge or level, according to the operation mode (default edge, configured by the SuperI/O Parallel Port Configuration register at index F0h). IRRX2,1 79, 80 UART2 (SIR) Input Group 1 Infrared Reception 1 and 2 – Infrared serial input data. IRRX2 is multiplexed with IRSL0 and ID0. See Table 1-2 on page 23 for more information. IRSL0 IRSL1 IRSL2 79 or 158 78 or 157 77 or 158 UART2 (SIR) Output Infrared Control Signals 0, 1 and 2 – These signals control the Infrared analog front end. The pins on which these signals are driven is determined by the SuperI/O Configuration 2 register (index 22h). See Section 2.4.4 on page 35. IRSL0 or ID0/IRRX2 on pin 79 is determined by UART2 bit 5 of the IRCFG4 register (See page 165). IRSL0 is multiplexed on pin 79 with IRRX2 and ID0, or on pin 158 with GPIO21, IRSL2 and ID2. IRSL1 is multiplexed on pin 78 with XD7 and ID1, or on pin 157 with GPIO20 and ID1. IRSL2 is multiplexed on pin 77 with XD6, SELCS and GPIO21, or on pin 158 with GPIO21, IRSL0 and ID2. 79, 78, 77 Group 17 158, 157 Group 10 Signal/Pin Name Pin Number Module I/O and Group # Function |
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