PC97338 datasheet(110/221 Pages) NSC

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Command Phase

The command phase bytes of the READ A TRACK

command are like those of the READ DATA com-

mand, except for the MT and SK bits. Multi-track and

skip operations are not allowed in the READ A

TRACK command. Therefore, bits 7 and 5 of the op-

code command phase byte (MT and SK, respectively)

must be 0.

First Command Phase Byte, Opcode

See “Bit 6 - Modified Frequency Modulation

(MFM)” on page 96.

Second Command Phase Byte

See “Second Command Phase Byte” on page 96

for a description of the Drive Select (DS1,0) and

Head Select (HD) bits.

See “Bit 5 - Implied Seek (IPS)” on page 101 for a

description of the Implied Seek (IPS) bit.

Third through Ninth Command Phase Bytes

See “The READ DATA Command” on page 105.

Execution Phase

Data read from the disk drive is transferred to the sys-

tem in DMA or non-DMA modes. See Section 3.4.2.

Execution of this command is like execution of the

READ DATA command except for the following differ-

ences:

• The controller waits for a pulse from the INDEX

signal before it searches for the address field of a

sector.

If the microprocessor writes to the FIFO before the

INDEX pulse is detected, the command enters the

result phase with the Interrupt Code (IC) bits (bits

7,6) in ST0 set to abnormal termination (01).

• All the ID bytes of the sector address are com-

pared, except the sector number. Instead, the sec-

tor number is set to 1, and then incremented for

each successive sector read.

• If no match occurs when the ID bytes of the sector

address are compared, the controller sets the

Missing Data bit (bit 2) in ST1, but continues to

read the sector. If there is a CRC error in the ad-

dress field being read, the controller sets CRC Er-

ror (bit 5) in ST1, but continues to read the sector.

• If there is a CRC error in the data field, the control-

ler sets the CRC Error bit (bit 5) in ST1 and CRC

Error in Data Field bit (bit 5) in ST2, but continues

reading sectors.

• The controller reads a maximum of End of Track

(EOT) physical sectors. There is no support for

multi-track reads.

Result Phase

3.6.14 The RECALIBRATE Command

The RECALIBRATE command issues pulses that

make the head of the selected drive step out until it

reaches track 0.

Command Phase

Second Command Phase Byte

See “Second Command Phase Byte” on page 96

for a description of the Drive Select (DS1,0) and

Head Select (HD) bits.

Execution Phase

After the last command byte is issued, the Drive Busy

bit for the selected drive is set in the Main Status Reg-

ister (MSR). See bits 3-0 in “Main Status Register

(MSR), Offset 100” on page 80.

7654

3210

MFM

0010

IPS

DS1

DS0

Track Number

Head Number

Sector Number

Bytes-Per-Sector Code

End of Track (EOT) Sector Number

Bytes Between Sectors - Gap 3

Data Length (Obsolete)

7654

3210

Result Phase Status Register 0 (ST0)

Result Phase Status Register 1 (ST1)

Result Phase Status Register 2 (ST2)

Track Number

Head Number

Sector Number

Bytes-Per-Sector Code

7654

3210

0000

0111

XXX

DS1

DS0

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