STCF05

Detailed description

Doc ID 15257 Rev 4

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7

Detailed description

7.1

Introduction

The STCF05 is a synchronous boost converter, dedicated to power and control the current

of power white LEDs in a camera cell phones. The device operates at a typical constant

switching frequency of 1.8 MHz. It steps an input voltage ranging from 2.5 V to 5.5 V up to

10.2 V. I²C bus controls device operation and diagnostic. Torch current is adjustable from 15

mA to 120 mA; flash current is adjustable up to 400 mA; aux LED current can be adjusted

from 0 to 20 mA. The device uses an external NTC to sense the temperature of the white

LEDs. These NTC functions may not be needed in all applications, and in those cases the

relevant external components can be omitted.

7.2

Boost converter

The STCF05 contains the 3-loop system of the PWM controller regulation and soft-start

function. When the output voltage is lower than input voltage, the STCF05 is charging output

by the internal current source with 120 mA typ. When the output voltage is higher than

battery, the STCF05 automatically enable the boost converter with 3-loop regulation system.

First loop is controlling the output current according the setting of the dimming register,

second loop is regulating the output voltage to the stable value and third loop is regulating

the voltage drop on the LED current source to reach high efficiency of the operation. (see

Figure 1: Block diagram).

7.3

Logic pin description

7.3.1

SCL, SDA pins

These are the standard clock and data pins as defined in the I²C bus specification. External

pull-up is required according to I²C bus specifications.

7.3.2

TRIG pin

This input pin is internally and-ed with the TRIG_EN bit to generate the internal signal that

activates the flash operation. This gives to the user the possibility to accurately control the

flash duration using a dedicated pin, avoiding the I²C bus latencies (hard-triggering). No

internal pull-up nor pull-down is provided.

7.3.3

ATN pin

This output pin (open-drain, active LOW) is provided to better manage the information

transfer from the STCF05 to the microprocessor. Because of the limitations of a single

master I²C bus configuration, the microprocessor should regularly poll the STCF05 to verify

if certain operations have been completed, or to check diagnostic information. Alternatively,

the microprocessor can use the ATN pin to be advised that new data are available in the

STAT_REG, thus avoiding continuous polling. The information can be read in the

STAT_REG by a read operation via I²C that, besides, automatically resets the ATN pin. The

STAT_REG bits affecting the ATN pin status are mapped in Table 15. No internal pull-up is

provided.