PC87364 datasheet(39/180 Pages) NSC

39 / 180 page

2.0 Device Architecture and Configuration (Continued)

www.national.com

When bit 2 of the SIOCF5 register is set to 1, it causes the appropriate output function, either CHLOCK or CHUNLOCK, to

be asserted for a duration of 0.75 second. Then, this output function is deasserted. During the time the output function is

asserted, and for an additional 0.25 second afterwards, bit 2 of the SIOCF5 register returns 1 on reads, and no action can

be initiated. This protection mechanism prevents lock/unlock operations from being performed at short intervals to protect

the mechanical lock/unlock mechanism.

2.4.3

Access Lock to I/O Ports

Locking access to the I/O ports of the device is based on the SIOCF6 register (for details, see Section 2.7.7). This protection

feature is implemented for the following logical devices:

FDC (Logical Device 0)

Parallel Port (Logical Device 1)

Serial Port 2 (Logical Device 2)

Serial Port 1 (Logical Device 3)

ACB (Logical Device 8)

Each one of these logical devices has an associated bit in the SIOCF6 register. When one of these bits is set, the associated

logical device is completely disabled. For example, when bit 0 of the SIOCF6 register is set to 1, the FDC is disabled.

To lock access to the I/O ports, the SIOCF6 register must be set to read only. This can be done by either software or hard-

ware. By software, set bit 7 of the SIOCF6 register to 1. This bit can only be cleared (read/write enabled) by a hardware reset.

Alternatively, use the XLOCK input hardware-based function to set the SIOCF6 register to read only. First, select XLOCK

on its pin, pin 53, by setting bit 4 of the SIOCF3 register to 1. XLOCK can then can be used to control the SIOCF6 register,

as follows:

When XLOCK is driven high, the SIOCF6 register is read/write.

When XLOCK is driven low, the SIOCF6 register is read only.

2.4.4

Pin Configuration Lock

To lock the pin configuration of the PC87364 in order to prevent unwanted changes to hardware configuration, set bit 7 of

the SIOCF1 register to 1. Setting this bit causes all function select configuration bits, including those that are battery backed,

to become read only bits. This bit can only be cleared by a hardware reset.

2.4.5

GPIO Pin Function Lock

The PC87364 is capable of locking the attributes of each GPIO or Standby GPIO pin. The following attributes can be locked:

Output enable

Output type

Static pull-up

Driven data.

GPIO pins are locked per pin by setting the Lock bit in the appropriate GPIO Pin Configuration register. When the Lock bit

is set, the configuration of the associated GPIO pin can only be released by a hardware reset.

Standby GPIO pins are locked in the same manner by setting the Lock bit in the appropriate Standby GPIO Pin Configuration

registers. However, once a Standby GPIO pin is locked, its locked attributes can only be released with a VSB power-up reset.

2.5

POWER SUPPLY CONTROL (PSC)

The PC87364 includes hardware that can be used to ease the system’s control over the computer’s power supply. This hard-

ware is implemented as a state machine that determines the required state of the power supply based on several input sig-

nals, and also connects to the system’s ACPI controller to share information about the system’s power state via specific

interface signals.

The PSC uses the pin functions SLPS3, SLPS5, PWBTIN, PWBTOUT and PSON. These functions are optional on their

respective pins and must be selected to enable the PSC by setting the values of the PSLDC0,1 strap pins (see Table 14).

Once enabled, the PSC can be operated in one of two modes, according to the value of bit 0 (Power Button Mode) of the

SIOCFD register:

ACPI mode

Legacy mode

PC87364 数据表(PDF) 39 Page - National Semiconductor (TI)

PC87364 数据表(HTML) 39 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载