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PC87364 数据表(PDF) 48 Page - National Semiconductor (TI) |
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PC87364 数据表(HTML) 48 Page - National Semiconductor (TI) |
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48 / 180 page ![]() 2.0 Device Architecture and Configuration (Continued) 48 www.national.com 2.9.6 SuperI/O Configuration 5 Register (SIOCF5) Location: Index 25h Type: Varies per bit Bit 76543210 Name Reserved SMI to IRQ2 Enable Chassis Hood Lock Chassis Hood Ac- tion/Status Pin 128 Function Select Reset 00000000 Bit Description 7-5 Reserved 4 SMI to IRQ2 Enable. This is a R/W bit. 0: Disabled (default) 1: Enabled 3 Chassis Hood Lock. This is a R/W bit. 0: Unlock (default) 1: Lock 2 Chassis Hood Action/Status. This is a R/W bit. Writing 1 operates the lock/unlock function determined by bit 3 of this register. Writing 0 deactivates an action in progress. Before setting this bit, the software must verify that it is set to 0. 0: Inactive/Ready (default) 1: Activate/Busy 1-0 Pin 128 Function Select. This is a R/W bit. Bits 1 0 Function 0 0 GPIO33 (default) 0 1 FANIN2 1 0 CHUNLOCK 1 1 Reserved |
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