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CC1020-RTR1 数据表(PDF) 19 Page - Texas Instruments

部件名 CC1020-RTR1
功能描述  Low-Power RF Transceiver for Narrowband Systems
PDF  95 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

CC1020-RTR1 数据表(HTML) 19 Page - Texas Instruments

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CC1020
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SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015
5.4
Microcontroller Interface
Used in a typical system, CC1020 will interface to a microcontroller. This microcontroller must be able to:
•
Program CC1020 into different modes via the 4-wire serial configuration interface (PDI, PDO, PCLK
and PSEL).
•
Interface to the bi-directional synchronous data signal interface (DIO and DCLK).
•
Optionally, the microcontroller can do data encoding and decoding.
•
Optionally, the microcontroller can monitor the LOCK pin for frequency lock status, carrier sense status
or other status information.
•
Optionally, the microcontroller can read back the digital RSSI value and other status information via the
4-wire serial interface.
5.4.1
Configuration Interface
The microcontroller interface is shown in Figure 5-3. The microcontroller uses 3 or 4 I/O pins for the
configuration interface (PDI, PDO, PCLK and PSEL). PDO should be connected to a microcontroller input.
PDI, PCLK and PSEL must be microcontroller outputs. One I/O pin can be saved if PDI and PDO are
connected together and a bi-directional pin is used at the microcontroller.
The microcontroller pins connected to PDI, PDO and PCLK can be used for other purposes when the
configuration interface is not used. PDI, PDO and PCLK are high impedance inputs as long as PSEL is
not activated (active low).
PSEL has an internal pullup resistor and should be left open (tri-stated by the microcontroller) or set to a
high level during power down mode in order to prevent a trickle current flowing in the pullup.
5.4.2
Signal Interface
A bi-directional pin is usually used for data (DIO) to be transmitted and data received. DCLK providing the
data timing should
As an option, the data output in receive mode can be made available on a separate pin. See Section 5.6
for further details.
5.4.3
PLL Lock Signal
Optionally, one microcontroller pin can be used to monitor the LOCK signal. This signal is at low logic
level when the PLL is in lock. It can also be used for carrier sense and to monitor other internal test
signals.
Figure 5-3. Microcontroller Interface
Copyright © 2006–2015, Texas Instruments Incorporated
Detailed Description
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