CC1020-RTR1 datasheet(48/95 Pages) TI1

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CC1020

SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015

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There are separate calibration values for the two frequency registers. However, dual calibration is possible

if all of the below conditions apply:

•

The two frequencies A and B differ by less than 1 MHz.

•

Reference frequencies are equal (REF_DIV_A[2:0] = REF_DIV_B[2:0] in the CLOCK_A/CLOCK_B

registers).

•

VCO currents are equal (VCO_CURRENT_A[3:0] = VCO_CURRENT_B[3:0] in the VCO register).

The CAL_DUAL bit in the CALIBRATE register controls dual or separate calibration.

The single calibration algorithm (CAL_DUAL=0) using separate calibration for RX and TX frequency is

illustrated in Figure 5-26. The same algorithm is applicable for dual calibration if CAL_DUAL=1. Refer to

Application Note AN023 CC1020 MCU Interfacing (SWRA069), which includes example source code for

single calibration.

TI recommends that single calibration be used for more robust operation.

There is a small, but finite, possibility that the PLL self-calibration will fail. The calibration routine in the

source code should include a loop so that the PLL is re-calibrated until PLL lock is achieved if the PLL

does not lock the first time. Refer to CC1020 Errata Note 004, available in the CC1020 product folder.

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CC1020-RTR1 数据表(PDF) 48 Page - Texas Instruments