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TNETV2665FIBZWT4 数据表(PDF) 139 Page - Texas Instruments |
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TNETV2665FIBZWT4 数据表(HTML) 139 Page - Texas Instruments |
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139 / 249 page  TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 6.4.1 EDMA3 Channel Synchronization Events The EDMA supports up to 64 EDMA channels which service peripheral devices and external memory. Table 6-6 lists the source of EDMA synchronization events associated with each of the programmable EDMA channels. For the C6424 device, the association of an event to a channel is fixed; each of the EDMA channels has one specific event associated with it. These specific events are captured in the EDMA event registers (ER, ERH) even if the events are disabled by the EDMA event enable registers (EER, EERH). For more detailed information on the EDMA module and how EDMA events are enabled, captured, processed, linked, chained, and cleared, etc., see the TMS320C642x DSP Enhanced DMA (EDMA) Controller User's Guide (literature number SPRUEM5). Table 6-6. C6424 EDMA Channel Synchronization Events(1) EDMA EVENT NAME EVENT DESCRIPTION CHANNEL 0-1 – Reserved 2 XEVT0 McBSP0 Transmit Event 3 REVT0 McBSP0 Receive Event 4 XEVT1 McBSP1 Transmit Event 5 REVT1 McBSP1 Receive Event 6 – Reserved 7 – Reserved 8 – Reserved 9 – Reserved 10 AXEVTE0 McASP0 Transmit Event Even 11 AXEVTO0 McASP0 Transmit Event Odd 12 AXEVT0 McASP0 Transmit Event 13 AREVTE0 McASP0 Receive Event Even 14 AREVTO0 McASP0 Receive Event Odd 15 AREVT0 McASP0 Receive Event 16-21 – Reserved 22 URXEVT0 UART 0 Receive Event 23 UTXEVT0 UART 0 Transmit Event 24 URXEVT1 UART 1 Receive Event 25 UTXEVT1 UART 1 Transmit Event 26 – Reserved 27 – Reserved 28 ICREVT I2C Receive Event 29 ICXEVT I2C Transmit Event 30-31 – Reserved 32 GPINT0 GPIO 0 Interrupt 33 GPINT1 GPIO 1 Interrupt 34 GPINT2 GPIO 2 Interrupt 35 GPINT3 GPIO 3 Interrupt 36 GPINT4 GPIO 4 Interrupt 37 GPINT5 GPIO 5 Interrupt 38 GPINT6 GPIO 6 Interrupt 39 GPINT7 GPIO 7 Interrupt 40 GPBNKINT0 GPIO Bank 0 Interrupt 41 GPBNKINT1 GPIO Bank 1 Interrupt (1) In addition to the events shown in this table, each of the 64 channels can also be synchronized with the transfer completion or alternate transfer completion events. For more detailed information on EDMA event-transfer chaining, see the TMS320C642x DSP Enhanced DMA (EDMA) Controller User's Guide (literature number SPRUEM5). Copyright © 2007–2009, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 139 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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