DocID11110 Rev 13

11/31

STM632x, STM682x

Operation

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2.3

Push-button reset input (STM6322/6821/6822/6823/6825)

Figure 25 on page 19) after it returns high. The MR input has an internal 52 k

Ω pull-up

resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic

levels or with open drain/collector outputs. Connect a normally open momentary switch from

MR to GND to create a manual reset function; external debounce circuitry is not required. If

MR is driven from long cables or the device is used in a noisy environment, connect a 0.1

µF capacitor from MR to GND to provide additional noise immunity. MR may float, or be tied

2.4

Watchdog input (STM6321/6821/6822/6823/6824)

The watchdog timer can be used to detect an out-of-control MCU. If the MCU does not

watchdog timer is cleared by either:

1.

a reset pulse, or

2.

by toggling WDI (high to low or low to high), which can detect pulses as short as 50 ns.

The timer remains cleared and does not count for as long as reset is asserted. As soon as

reset is released, the timer starts counting.

Note:

The watchdog function may be disabled by floating WDI or tristating the driver connected to

WDI. When tristated or disconnected, the maximum allowable leakage current is 10 µA and

the maximum allowable load capacitance is 200 pF.

2.5

Applications information

2.5.1

Watchdog input current

The WDI input is internally driven through a buffer and series resistor from the watchdog

counter. For minimum watchdog input current (minimum overall power consumption), leave

WDI low for the majority of the watchdog timeout period. When high, WDI can draw as much

as 160 µA. Pulsing WDI high at a low duty cycle will reduce the effect of the large input

current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog

timeout period by a low-high-low pulse from the counter chain.

2.5.2

low outputs (push/pull only, see Figure 12 on page 12) and a pull-up resistor to active high

outputs (push/pull only, see Figure 13 on page 12) will ensure that the reset line is valid

while the reset output can no longer sink or source current. This scheme does not work with

the open drain outputs of the STM6321/6322/6822.

The resistor value used is not critical, but it must be large enough not to load the reset