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STUSB1600 数据表(PDF) 41 Page - STMicroelectronics |
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STUSB1600 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 69 page ![]() DocID028937 Rev 1 41/69 STUSB1600 I2C register map 69 5.1.19 VBUS_MONITORING_CTRL Address: 2Eh Access: R/W Note: this register allows the default monitoring conditions of the VBUS voltage over the power path from the VDD and VBUS_SENSE pins to be modified. The VBUS_VALID_RANGE_DISABLE and VBUS_VSAFE0V_THRESHOLD bits are defining monitoring conditions applicable to the VBUS_SENSE pin connected to the USB Type-C receptacle side. The VBUS_VALID_RANGE_DISABLE bit allows the valid VBUS voltage range condition to be substituted by the VBUS UVLO threshold condition to establish a valid device attachment and to assert the VBUS power path. The VBUS_VSAFE0V_THRESHOLD bit indicates the voltage value of the VBUS vSafe0V threshold used in source power role as a Type-C FSM condition to establish a valid device attachment. The VDD_UVLO_DISABLE and VDD_OVLO_DISABLE bits are defining monitoring conditions applicable to the VDD supply pin when it is connected to the main power supply in source power role only. • When UVLO detection is enabled, the VBUS_EN_SRC pin is asserted only if the voltage on the VDD pin is above a UVLO threshold of 3.9 V. • When OVLO detection is enabled, the VBUS_EN_SRC pin is asserted only if the voltage on the VDD pin is below a OVLO threshold of 6.0 V. Table 36. VBUS_MONITORING_CTRL register Bit Field name Reset Description 7 Reserved 0b Do not use 6 VDD_OVLO_DISABLE 0b (NVM) 0b: enables OVLO threshold detection on VDD pin 1b: disables OVLO threshold detection on VDD pin 5 Reserved 0b Do not use 4 VBUS_VALID_RANGE_DISABLE 0b (NVM) 0b: enables valid VBUS voltage range detection 1b: disables valid VBUS voltage range detection (UVLO threshold detection used instead) 3 Reserved 0b Do not use 2:1 VBUS_VSAFE0V_THRESHOLD 00b (NVM) 00b: VBUS vSafe0V threshold = 0.6 V 01b: VBUS vSafe0V threshold = 0.9 V 10b: VBUS vSafe0V threshold = 1.2 V 11b: VBUS vSafe0V threshold = 1.8 V 0 VDD_UVLO_DISABLE 1b (NVM) 0b: enables UVLO threshold detection on VDD pin 1b: disables UVLO threshold detection on VDD pin |
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