L6732C datasheet(11/32 Pages) STMICROELECTRONICS

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L6732C

5 Device description

11/32

Device description

5.1

Oscillator

The switching frequency can be fixed to two values: 250KHz or 500KHz by setting the proper

voltage at the EAREF pin (see Table 3. Pins function and section 4.3 Internal and external

reference).

5.2

Internal LDO

An internal LDO supplies the internal circuitry of the device. The input of this stage is the VCC

pin and the output (5V) is the VCCDR pin (Figure 3.).

The LDO can be by-passed, providing directly a 5V voltage to VCCDR. In this case VCC and

VCCDR pins must be shorted together as shown in Figure 4. VCCDR pin must be filtered with at

least 1µF capacitor to sustain the internal LDO during the recharge of the bootstrap capacitor.

VCCDR also represents a voltage reference for PGOOD pin (see Table 3. Pins Function).

Figure 3.

LDO block diagram.

LDO

4.5V

÷14V

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