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L6985F 数据表(PDF) 49 Page - STMicroelectronics

部件名 L6985F
功能描述  Internal current limiting
PDF  65 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6985F 数据表(HTML) 49 Page - STMicroelectronics

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L6985F
Application notes
65
Figure 39. Slave to master mode transition
The external master can force a latched SLAVE mode driving the SYNCH pin low at power-
up, before the soft-start starts the switching activity. So the oscillator frequency is 250 kHz
typ. fixed until a new UVLO event is triggered regardless FSW resistor value, that otherwise
counts to design the slope compensation. The same considerations above are also valid.
The master driving capability must be able to provide the proper signal levels at the SYNCH
pin (see Table 5 on page 8 - Synchronization section):
 Low level < VSYN THL= 0.7 V sinking 5 mA
 High level > VSYN THH = 1.2 V sourcing 0.7 mA
Figure 40. Master driving capability to synchronize the L6985F
250kHz typ.
SLAVE mode
standalone operation at nominal fsw
SYNCH signal
switching node



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