DocID023654 Rev 2

7/27

ST1S41

Functional description

5

Functional description

The ST1S41 is based on a “peak current mode”, constant frequency control. The output

providing an error signal that, compared to the output of the current sense amplifier, controls

the on and off-time of the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

•

A fully integrated oscillator that provides the internal clock and the ramp for the slope

compensation avoiding sub-harmonic instability

•

The soft-start circuitry to limit inrush current during the startup phase

•

The transconductance error amplifier with integrated compensation network

•

The pulse width modulator and the relative logic circuitry necessary to drive the internal

power switches

•

The drivers for embedded P-channel and N-channel power MOSFET switches

•

The high-side current sensing block

•

The low-side current sense to implement diode emulation

•

A voltage monitor circuitry (UVLO) that checks the input and internal voltages

•

A thermal shutdown block, to prevent thermal run-away.

Figure 3. Block diagram

OSC

E/A

DRIVER

DRIVER

DMD

OTP

MOSFET

CONTROL

LOGIC

REGULATOR

SHUTDOWN

I_SENSE

COMP

COMP

OCP

REF

0.8V

SOFT-START

Vsum

Vc

OCP

UVLO

Vdrv_p

Vdrv_n

I2V

R SENSE

VINA

VINSW

SW

GNDP

GNDA

EN

FB

AM15060v1