Application information

ST1S41

20/27

DocID023654 Rev 2

The input capacitor connected to VINSW must be placed as close as possible to the device,

to avoid spikes on VINSW due to the stray inductance and the pulsed input current.

In order to prevent dynamic unbalance between VINSW and VINA, the trace connecting the

VINA pin to the input must be derived from VINSW.

The feedback pin (FB) connection to the external resistor divider is a high impedance node,

so the interference can be minimized routing the feedback node with a very short trace and

as far as possible from the high current paths.

A single point connection from signal ground to power ground is suggested.

Thanks to the exposed pad of the device, the ground plane helps to reduce the thermal

resistance junction-to-ambient; so a large ground plane, soldered to the exposed pad,

enhances the thermal performance of the converter allowing high power conversion.

Figure 8. Suggested PCB layout

Input cap as close as possible

t

o VINSW pin

Star center for common ground

Short FB trace

VINA derived from Cin

to avoid dynamic voltage drop

between VINA and VINSW

Short high switching

current loop

Via to connect the thermal pad

To bottom or inner ground plane

AM15065v1