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STEF033 数据表(PDF) 11 Page - STMicroelectronics |
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STEF033 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 25 page ![]() DocID025099 Rev 2 11/25 STEF033 Typical application 25 5.3 Cdv/dt calculation The device includes a rise-time control circuit, allowing the soft-start during turn-on and Hot- plug of the equipment. The pre-programmed rise time, defined as the time interval during which the output voltage goes from 10% to 90% of the nominal voltage, is typically 1.4 ms. The STEF033 and STEF033A in DFN10 package feature a user-programmable output voltage ramp-up time; by connecting a capacitor between the Cdv/dt pin and GND, modification of the output voltage ramp-up time is possible. The capacitance to be added on the Cdv/dt pin can be selected using the following table. Figure 5. Delay time and VOUT rise time 5.4 Enable-Fault pin The Enable/Fault pin has the dual function of controlling the output of the device and, at the same time, of providing information about the device status to the application. It can be connected to an external open-drain or open-collector device. In this case, when it is pulled at low logic level, it will turn the output of the E-Fuse off. If this pin is left floating, since it has internal pull-up circuitry, the output of the E-Fuse is kept ON in normal operating conditions. This pin should never be biased to a voltage higher than 3.6 V. In case of thermal fault, the pin is pulled to an intermediate state (Figure 6). This signal can be provided to a monitor circuit, signaling that a thermal shutdown has occurred, or it can be Table 7. Typical rise time values vs. dv/dt capacitor Cdv/dt none 100 pF 470 pF 1 nF Rise Time (1) [ms] 1. VCC = 3.3 V, CIN = 10 µF, COUT = 10 µF, RLIMIT = 24 Ω, IOUT = 1 A 1.4 2.8 8 16 10% 90% rise time delay time Enable V OUT |
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