List of figures

VIPer0P

4/36

DocID028423 Rev 2

List of figures

Figure 1: Basic application schematic ........................................................................................................1

Figure 2: Connection diagram ....................................................................................................................5

Figure 3: IDLIM vs TJ ...................................................................................................................................12

Figure 4: ION vs VON...................................................................................................................................12

Figure 5: FOSC vs TJ...................................................................................................................................12

Figure 6: VHV_START vs TJ ...........................................................................................................................12

Figure 7: VFB_REF vs TJ...............................................................................................................................12

Figure 8: Quiescent current Iq vs TJ ..........................................................................................................12

Figure 9: Operating current ICC vs TJ ........................................................................................................13

Figure 10: ICOMP vs TJ................................................................................................................................13

Figure 11: ICH1 vs TJ ..................................................................................................................................13

Figure 12: ICH1 vs VDRAIN............................................................................................................................13

Figure 13: ICH2 vs TJ ..................................................................................................................................13

Figure 14: ICH2 vs VDRAIN............................................................................................................................13

Figure 15: ICH3 vs TJ ..................................................................................................................................14

Figure 16: ICH3 vs VDRAIN............................................................................................................................14

Figure 17: GM vs TJ ...................................................................................................................................14

Figure 18: RDS(on) vs TJ..............................................................................................................................14

Figure 19: Static drain source on resistance ............................................................................................14

Figure 20: Output characteristic................................................................................................................14

Figure 21: VBVDSS vs TJ .............................................................................................................................15

Figure 22: Max avalache energy vs TJ .....................................................................................................15

Figure 23: SOA SO16N package..............................................................................................................15

Figure 24: Block diagram ..........................................................................................................................16

Figure 25: IC supply modes: self-supply and external supply ..................................................................17

Figure 26: Power-ON and power-OFF......................................................................................................18

Figure 27: Soft startup ..............................................................................................................................19

Figure 28: Pulse skipping during start-up for FOSC = 60 kHz ....................................................................20

Figure 29: ZPM managed in mixed mode.................................................................................................22

Figure 30: ZPM fully managed by MCU....................................................................................................22

Figure 31: Overload condition...................................................................................................................23

Figure 32: Thermal shutdown timing diagram ..........................................................................................24

Figure 33: Flyback converter (non-isolated) .............................................................................................25

Figure 34: Negative output flyback converter (non-isolated) ....................................................................25

Figure 35: Isolated flyback converter with secondary feedback ...............................................................26

Figure 36: Primary side regulation isolated flyback converter ..................................................................26

Figure 37: Buck converter (positive output) ..............................................................................................27

Figure 38: Buck-boost converter (negative output) ..................................................................................27

Figure 39: Example of interfacing the VIPer0P to a MCU supplied from a negative rail ..........................28

Figure 40: PIN versus VIN in ZPM and no load ..........................................................................................29

Figure 41: PIN versus VIN in light load .......................................................................................................29

Figure 42: Recommended routing for flyback converter...........................................................................31

Figure 43: Recommended routing for buck converter ..............................................................................31

Figure 44: SO16N package outline...........................................................................................................32