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VIPER0PHDTR 数据表(PDF) 21 Page - STMicroelectronics

部件名 VIPER0PHDTR
功能描述  Zero-power off-line high voltage converter
PDF  36 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER0PHDTR 数据表(HTML) 21 Page - STMicroelectronics

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VIPer0P
General description
DocID028423 Rev 2
21/36
The FB is provided with an internal pull-up to prevent a wrong IC behavior when the pin is
accidentally left floating.
4.9
Secondary feedback
When a secondary feedback is required, the internal E/A has to be disabled shorting FB to
EAGND (VFB < VFB_DIS). With this setting COMP is internally connected to a pre-regulated
voltage through the pull-up resistor RCOMP(DYN)
, (65 kΩ, typ.) and the voltage across COMP
is set by the current sunk.
This allows the output voltage value to be set through an external error amplifier (TL431 or
similar) placed on the secondary side, whose error signal is used to set the DRAIN peak
current setpoint corresponding to the output power demand. If isolation is required, the
error signal must be transferred through an optocoupler, with the phototransistor collector
connected across COMP and SGND.
4.10
Pulse frequency modulation
If the output load is decreased, the feedback loop reacts lowering the VCOMP voltage, which
reduces the DRAIN peak current setpoint, down to the minimum value of IDLIM_PFM when the
VCOMPL threshold is reached.
If the load is further decreased, the DRAIN peak current value is maintained at IDLIM_PFM and
some PWM cycles are skipped. This mode of operation is referred to as “pulse frequency
modulation” (PFM), the number of the skipped cycles depends on the balance between the
output power demand and the power transferred from the input. The result is an equivalent
switching frequency which can go down to some hundreds Hz, thus reducing all the
frequency-related losses.
This kind of operation, together with the extremely low IC quiescent current, allows very low
input power consumption in no load and light load, while the low DRAIN peak current value,
IDLIM_PFM, prevents any audible noise which could arise from low switching frequency
values. When the load is increased, VCOMP increases and PFM is exited. VCOMP reaches its
maximum at VCOMPH and corresponding to that value, the DRAIN current limitation (IDLIM) is
reached.
4.11
Zero-power mode
The zero-power mode (ZPM) is a special idle state of VIPer0P, characterized by the
following features:
there is no switching activity, then neither voltage nor power, available at the output
the HV current source charges VCC at 13 V and does not perform its usual functions
all IC circuits, except the ones needed to exit ZPM, are turned off, reducing the
controller consumption to very low values
The IC enters ZPM if OFF is forced to SGND for more than tDEB_OFF (10 ms, typ.), the IC
exits ZPM if ON is forced to SGND for a more than tDEB_ON
(20 μs, typ.).
The ZPM can be managed manually or by a microcontroller (MCU) or in mixed mode. In
case of mixed ZPM management (see Figure 29: "ZPM managed in mixed mode") the
MCU supervising the operation of the appliance shuts down the SMPS by pulling low OFF
through one of its GPIOs, cutting also its own supply voltage. The restart is commanded by
a pushbutton or a tactile switch pressed by the user that directly operates pin ON. For
safety reasons, this switch should operate at low voltage (SELV level). The MCU wakes up
after the SMPS is again up and running. This arrangement provides the minimum
consumption from the power line.



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