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VIPER0PHDTR 数据表(PDF) 5 Page - STMicroelectronics

部件名 VIPER0PHDTR
功能描述  Zero-power off-line high voltage converter
PDF  36 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER0PHDTR 数据表(HTML) 5 Page - STMicroelectronics

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VIPer0P
Pin setting
DocID028423 Rev 2
5/36
1
Pin setting
Figure 2: Connection diagram
The PCB copper area for heat dissipation has to be provided under the DRAIN
pins.
Table 1: Pin description
SO16N
Name
Function
1
PGND
Power ground and MOSFET source. The pulsed current flowing through the
Power MOSFET must be closed on this pin. The pin must be connected to
the same ground plan of SGND with the shortest track.
2
EAGND
Error amplifier ground reference. In case of non-isolated flyback converter
with negative output voltage, this pin can be connected directly to the
negative rail. Otherwise, in case of positive output voltage, the pin must be
shorted to SGND.
3
VCC
Controller supply. An external storage capacitor has to be connected across
this pin and SGND. The pin, internally connected to the high-voltage current
source, provides the VCC capacitor charging current at startup and, if self-
supply mode is selected, also during steady-state operation. A small bypass
capacitor (0.1 μF typ.) in parallel, placed as close as possible to the IC, is also
recommended, for noise filtering purpose.
4
SGND
Signal ground. All of the groundings of bias components must be tied to a
trace going to this pin and kept separate from the pulsed current return.
5
FB
Direct feedback. It is the inverting input of the internal transconductance E/A,
which is internally referenced to 1.2 V with respect to EAGND. In case of non-
isolated converter, the output voltage information is directly fed into the pin
through a voltage divider. In case of primary regulation, the FB voltage divider
is connected to the VCC. The E/A is disabled soldering FB to EAGND.
6
COMP
Compensation. It is the output of the internal E/A. A compensation network
is placed between this pin and SGND to achieve stability and good dynamic
performance of the control loop. In case of secondary feedback, the internal
E/A must be disabled and the COMP directly driven by the optocoupler to
control the DRAIN peak current setpoint.
PGND
DRAIN
DRAIN
SGND
COMP
EAGND
FB
ON
OFF
DRAIN
DRAIN
N.C.
N.C.
N.C.
N.C.
VCC
VIPer0P
GIPD210420151108MT



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