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STM8SPLNB1 数据表(PDF) 6 Page - STMicroelectronics |
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STM8SPLNB1 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 44 page ![]() Device description STM8SPLNB1 6/44 DocID018831 Rev 5 1 Device description 1.1 Implementation STM8SPLNB1 device is receiving DiSEqC signal on the coaxial cable, decoding and processing the DiSEqC commands. As a result, legacy matrix or I2C lines are controlled. The STM8SPLNB1 device can also send DiSEqC answer back to master through coaxial cable. STM8SPLNB1 is designed for usage with LNB devices with I2C bus control and/or direct pins control (see Figure 2: STM8SPLNB1 typical configuration). SaTCR1 device is typically used in LNB application (see www.st.com for more SaTCR1 information). Behavior of STM8SPLNB1 devices can be modified through a set of configuration parameters which are stored in device data EEPROM memory. Configuration is done also through specific DiSEqC commands. After final configuring the device can be locked to given configuration (vendor configuration). Figure 2: STM8SPLNB1 typical configuration shows the recommended configuration for the hardware connections for LNB control with STM8SPLNB1 devices. Figure 2. STM8SPLNB1 typical configuration 1. Power supply must have level 5V +/- 10% for correct operation. |
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