数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TP3155N 数据表(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 TP3155N
功能描述  TP3155 Time Slot Assignment Circuit
PDF  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

TP3155N 数据表(HTML) 5 Page - National Semiconductor (TI)

  TP3155N Datasheet HTML 1Page - National Semiconductor (TI) TP3155N Datasheet HTML 2Page - National Semiconductor (TI) TP3155N Datasheet HTML 3Page - National Semiconductor (TI) TP3155N Datasheet HTML 4Page - National Semiconductor (TI) TP3155N Datasheet HTML 5Page - National Semiconductor (TI) TP3155N Datasheet HTML 6Page - National Semiconductor (TI) TP3155N Datasheet HTML 7Page - National Semiconductor (TI) TP3155N Datasheet HTML 8Page - National Semiconductor (TI) TP3155N Datasheet HTML 9Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 10 page
background image
Functional Description
OPERATING MODES
The TP3155 control interface requires an 8-bit serial control
word which is compatible with the TP3020TP3021 and
29102911 CODECs Two bits X and R define which of the
two groups of frame sync outputs FSX0toFSX3orFSR0to
FSR3 is affected by the control word and a 6-bit assign-
ment field specifies the selected time slot from 0 to 31 A
frame sync output is active-high for one time slot which is
always 8 cycles of BCLK A frame may consist of any num-
ber of time slots up to 32 If a timeslot is assigned which is
beyond the number of time slots in a frame the FSX or FSR
output to which it was assigned will remain inactive
Two modes of operation are available Mode 1 is for sys-
tems requiring different time slot assignments for the trans-
mit and receive direction of each channel Mode 1 is select-
ed by leaving pin 9 (MODE) open-circuit or connecting it to
VCC In this case Pin 13 is the RSYNC input which defines
the start of each receive frame and the four outputs
FSR0–FSR3 are assigned with respect to RSYNC The
XSYNC input defines the start of each transmit frame and
outputs FSX0–FSX3 are assigned with respect to XSYNC
XSYNC may have any phase relationship with RSYNC In-
puts CH0 and CH1 select the channel from 0 to 3 (see
Table Ia)
Mode 2 provides the option of assigning all 8 frame sync
outputs with respect to the XSYNC input Mode 2 is select-
ed by connecting pin 9 (MODE) to GND This makes the
TP3155 TSAC useful for either an 8-channel undirectional
controller or for systems in which the transmit and receive
directions of each channel are always assigned to the same
time slot as the other ie the FSX and FSR inputs on the
COMBO CODECFilter are hard-wired together In this
case logical selection of the channel to be assigned is
made via inputs CH0 CH1 and CH2 (see Table Ib)
POWER-UP INITIALIZATION
During power-up all frame sync outputs FSX0–FSX3 and
FSR0–FSR3 are inhibited and held low No outputs will go
active until a valid time slot assignment is made
LOADING CONTROL DATA
During the loading of control data the binary code for the
selected channel must be set on inputs CH0 and CH1 (and
CH2 in mode 2) see Tables Ia and Ib
Control data is clocked into the DC input on the falling
edges of CLKC while CS is low
A new time slot assignment is transferred to the selected
assignment register on the high going transition of CS The
new assignment is re-synchronized to the system clock
such that the new FS output pulses will start at the next
complete valid time slot after the rising edge of CS
TIME SLOT COUNTER OPERATION
At the start of TS0 of each transmit frame defined by the
first falling edge of BCLK after XSYNC goes high the trans-
mit time slot counter is reset to 000000 and begins to incre-
ment once every 8 cycles of BCLK Each count is compared
with the 4 transmit assignment registers and on finding a
match a frame sync pulse is generated at that FSX output
Similarly the first falling edge of BCLK after RSYNC goes
high defines the start of receive TS0
and outputs
FSR0–FSR3 are generated with respect to TS0 when the
receive time slot counter matches the appropriate receive
assignment register
TSX OUTPUT
In mode 1 (separate transmit and receive assignments) this
output pulls low whenever any FSX output pulse is being
generated In mode 2 this output pulls low whenever any
FSX or FSR output is being generated At all other times it is
open-circuit allowing the TSX outputs of a number of
TSACS to be wire-ANDed together with a common pull-up
resistor This signal can be used to control the TRI-STATE
enable input of a line driver to buffer the transmit PCM bus
from the CODECFilters to the backplane
TABLE Ia Control Mode 1
(TP3020TP3021 Compatible)
X
R
T5
T4
T3
T2
T1
T0
X is the first bit clocked into the DC input
Control Data Format
T5
T4
T3
T2
T1
T0
Time Slot
000000
0
000001
1
000010
2
011110
30
011111
31
1
X
X
X
X
X
(Note 1)
CH1
CH0
Channel Selected
0
0
Assign to FSx0 andor FSR0
0
1
Assign to FSx1 andor FSR1
1
0
Assign to FSx2 andor FSR2
1
1
Assign to FSx3 andor FSR3
X
R
Action
0
0
Assign time slot to both selected FSX and FSR
0
1
Assign time slot to selected FSX only
1
0
Assign time slot to selected FSR only
1
1
Disable both selected FSX and FSR
TABLE Ib Control Mode 2
CH2
CH1
CH0
Channel Selected
0
0
0
Assign to FSX0
0
0
1
Assign to FSX1
0
1
0
Assign to FSX2
0
1
1
Assign to FSX3
1
0
0
Assign to FSR0
1
0
1
Assign to FSR1
1
1
0
Assign to FSR2
1
1
1
Assign to FSR3
X
R
Action
00
0
1
Assign time slot to selected output
10
(
1
1
Disable selected output
Note 1
When T5 e 1 then the appropriate FSX or FSR output is inactive
5



Html Pages

1 2 3 4 5 6 7 8 9 10


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com