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DS2148 数据表(PDF) 49 Page - Dallas Semiconductor

部件名 DS2148
功能描述  5V E1/T1/J1 Line Interface
PDF  75 Pages
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制造商  DALLAS [Dallas Semiconductor]
网页  https://www.maximintegrated.com/en.html
标志 DALLAS - Dallas Semiconductor

DS2148 数据表(HTML) 49 Page - Dallas Semiconductor

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DS2148/Q48
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9.4
G.703 Synchronization Signal
The DS2148 is capable of receiving a 2.048MHz square-wave synchronization clock as specified in
section 13 of ITU G.703 (10/98). To use the DS2148 in this mode, set the receive synchronization clock
enable (CCR5.3) = 1. The DS2148 can also transmit the 2.048MHz square-wave synchronization clock as
specified in Section 10 of G.703. To transmit the 2.048MHz clock, set the transmit synchronization clock
enable (CCR5.2) = 1.
LINE BUILD OUT SELECT FOR E1 IN REGISTER CCR4 (ETS = 0) Table 9-1
L2
L1
L0
VDD
APPLICATION
N
RETURN LOSS
Rt
0
0
0
5V
75
W normal
1:1.36
NM
0
W
0
0
1
5V
120
W normal
1:1.36
NM
0
W
1
0
0
5V
75
W w/ high return loss
1:1.36
21 dB
18
W
1
0
1
5V
120
W w/ high return loss 1:1.36
21 dB
27
W
Note: See Figure 9-1, Figure 9-2, and Figure 9-3.
LINE BUILD OUT SELECT FOR T1 IN REGISTER CCR4 (ETS = 1) Table 9-2
L2
L1
L0
VDD
APPLICATION
N
RETURN LOSS
Rt
0
0
0
5V
DSX-1 (0 to 133 feet) /
0 DB CSU
1:1.36
NM
0
W
0
0
1
5V
DSX-1 (133 to 266 feet)
1:1.36
NM
0
W
0
1
0
5V
DSX-1 (266 to 399 feet)
1:1.36
NM
0
W
0
1
1
5V
DSX-1 (399 to 533 feet)
1:1.36
NM
0
W
1
0
0
5V
DSX-1 (533 to 655 feet)
1:1.36
NM
0
W
1
0
1
5V
-7.5dB CSU
1:1.36
NM
0
W
1
1
0
5V
-15dB CSU
1:1.36
NM
0
W
1
1
1
5V
-22.5dB CSU
1:1.36
NM
0
W
Note: See Figure 9-1, Figure 9-2, and Figure 9-3.



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