M24512-x, M24256-Bx

DC and AC parameters

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Table 16.

AC characteristics (M24xxx-W, M24xxx-R, M24256-BF see Table 8, Table 9

Table 10 and Table 11)

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

400

kHz

Clock pulse width high

600

ns

Clock pulse width low

1300

ns

(1)

1.

Sampled only, not 100% tested.

SDA (out) fall time

20

100

ns

(2)

2.

Values recommended by I²C-bus/Fast-Mode specification.

Input signal rise time

20

300

ns

(2)

Input signal fall time

20

300

ns

Data in set up time

100

ns

Data in hold time

0

ns

Data out hold time

200

ns

(3)

3.

To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

Clock low to next data valid (access time)

200

900

ns

(4)

4.

For a re-Start condition, or following a Write cycle.

Start condition set up time

600

ns

Start condition hold time

600

ns

600

ns

Time between Stop condition and next Start

condition

1300

ns

Write time

5

ms

Pulse width ignored (input filter on SCL and

SDA) - single glitch

100

ns