STHDLS101A

Application information

Doc ID 15756 Rev 1

19/24

6

Application information

6.1

Power supply sequencing

Proper power-supply sequencing is advised for all CMOS devices. It is

or control pins.

6.2

Supply bypassing

as possible.

6.3

Differential traces

The high-speed inputs and TMDS outputs are the most critical parts for the device. There

are several considerations to minimize discontinuities on these transmission lines between

the connectors and the device.

(a) Maintain 100

Ω differential transmission line impedance into and out of the device.

(b) Keep an uninterrupted ground plane below the high-speed I/Os.

(c) Keep the ground-path vias to the device as close as possible to allow the shortest return

current path.

(d) Layout of the TMDS differential outputs should be with the shortest stubs from the

connectors.

Output trace characteristics affect the performance of the STHDLS101A. Use controlled

impedance traces to match trace impedance to both the transmission medium impedance

and termination resistor. Run the differential traces close together to minimize the effects of

the noise. Reduce skew by matching the electrical length of the traces. Avoid discontinuities

in the differential trace layout. Avoid 90 degree turns and minimize the number of vias to

further prevent impedance discontinuities.