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M58LW64D 数据表(PDF) 14 Page - STMicroelectronics |
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M58LW64D 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 50 page ![]() M58LW064D 14/50 COMMAND INTERFACE All Bus Write operations to the memory are inter- preted by the Command Interface. Commands consist of one or more sequential Bus Write oper- ations. The Commands are summarized in Table 4., Commands. Refer to Table 4. in conjunction with the text descriptions below. After power-up or a Reset operation the memory enters Read mode. Read Memory Array Command. The Read Mem- ory Array command is used to return the memory to Read mode. One Bus Write cycle is required to issue the Read Memory Array command and re- turn the memory to Read mode. Once the com- mand is issued the memory remains in Read mode until another command is issued. From Read mode Bus Read operations will access the memory array. After power-up or a reset the mem- ory defaults to Read Array mode (Page Read). While the Program/Erase Controller is executing a Program, Erase, Block Protect, Blocks Unprotect or Protection Register Program operation the memory will not accept the Read Memory Array command until the operation completes. Read Electronic Signature Command. The Read Electronic Signature command is used to read the Manufacturer Code, the Device Code, the Block Protection Status and the Protection Register. One Bus Write cycle is required to issue the Read Electronic Signature command. Once the com- mand is issued subsequent Bus Read operations read the Manufacturer Code, the Device Code, the Block Protection Status or the Protection Register until another command is issued. Refer to Table 6., Read Electronic Signature, Tables 7 and 8, Word and Byte-wide Read Protection Register and Figure 6., Protection Register Memory Map, for information on the addresses. Read Query Command. The Read Query Com- mand is used to read data from the Common Flash Interface (CFI) Memory Area. One Bus Write cycle is required to issue the Read Query Command. Once the command is issued subsequent Bus Read operations read from the Common Flash In- terface Memory Area. See APPENDIX B., Tables 24, 25, 26, 27, 28 and 29 for details on the infor- mation contained in the Common Flash Interface (CFI) memory area. Read Status Register Command. The Read Sta- tus Register command is used to read the Status Register. One Bus Write cycle is required to issue the Read Status Register command. Once the command is issued subsequent Bus Read opera- tions read the Status Register until another com- mand is issued. The Status Register information is present on the output data bus (DQ1-DQ7) when the device is en- abled and Output Enable is Low, VIL. See the section on the Status Register and Table 10. for details on the definitions of the Status Reg- ister bits Clear Status Register Command. The Clear Sta- tus Register command can be used to reset bits SR1, SR3, SR4 and SR5 in the Status Register to ‘0’. One Bus Write is required to issue the Clear Status Register command. The bits in the Status Register are sticky and do not automatically return to ‘0’ when a new Write to Buffer and Program, Erase, Block Protect, Block Unprotect or Protection Register Program com- mand is issued. If any error occurs then it is essen- tial to clear any error bits in the Status Register by issuing the Clear Status Register command before attempting a new Program, Erase or Resume command. Block Erase Command. The Block Erase com- mand can be used to erase a block. It sets all of the bits in the block to ‘1’. All previous data in the block is lost. If the block is protected then the Erase operation will abort, the data in the block will not be changed and the Status Register will output the error. Two Bus Write operations are required to issue the command; the second Bus Write cycle latches the block address in the internal state machine and starts the Program/Erase Controller. Once the command is issued subsequent Bus Read opera- tions read the Status Register. See the section on the Status Register for details on the definitions of the Status Register bits. During the Erase operation the memory will only accept the Read Status Register command and the Program/Erase Suspend command. All other commands will be ignored. Typical Erase times are given in Table 9. See APPENDIX C., Figure 18., Erase Flowchart and Pseudo Code, for a suggested flowchart on using the Block Erase command. Word/Byte Program Command. The Word/ Byte Program command is used to program a sin- gle Word or Byte in the memory array. Two Bus Write operations are required to issue the com- mand; the first write cycle sets up the Word Pro- gram command, the second write cycle latches the address and data to be programmed in the internal state machine and starts the Program/Erase Con- troller. If the block being programmed is protected an er- ror will be set in the Status Register and the oper- ation will abort without affecting the data in the |
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