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WM9705 数据表(PDF) 13 Page - Wolfson Microelectronics plc |
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WM9705 数据表(HTML) 13 Page - Wolfson Microelectronics plc |
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13 / 55 page ![]() WM9705 Production Data w PD Rev 4.0 December 2003 13 DETAILED TIMING DIAGRAMS Test Characteristics: AVDD = 3.3V, DVDD = 3.3V, AGND = 0V …………..TA = 0 oC to +70oC, unless otherwise stated. All measurements are taken at 10% to 90% DVDD, unless otherwise stated. All the following timing information is guaranteed, not tested. AC-LINK LOW POWER MODE SYNC BITCLK SDATAOUT WRITE TO 0X20 DATA PR4 DON'T CARE SDATAIN SLOT 1 SLOT 2 t S2_PDOWN Figure 4 AC-Link Powerdown Timing PARAMETER SYMBOL MIN TYP MAX UNIT End of slot 2 to BITCLK SDATAIN low tS2_PDOWN 1.0 µs COLD RESET RESETB BITCLK t RST_LOW t RST2CLK Figure 5 Cold Reset Timing Note: For correct operation SDATAOUT and SYNC must be held LOW for entire RESETB active low period otherwise the device may enter test mode. See AC’97 specification or Wolfson applications note WAN104 for more details. PARAMETER SYMBOL MIN TYP MAX UNIT RESETB active low pulse width tRST_LOW 1.0 µs RESETB inactive to BITCLK startup delay tRST2CLK 162.8 ns |
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