HT82K94A datasheet(9/43 Pages) HOLTEK

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HT82K94E/HT82K94A

Rev. 2.40

November 5, 2014

It will not be enabled until the TBLH has been backed

up. All table related instructions require two cycles to

complete the operation. These areas may function as

normal program memory depending on the require-

ments.

Once TBHP is enabled, the instruction

²TABRDC [m]²

reads the ROM data as defined by TBLP and TBHP

value. Otherwise, the ROM code option TBHP is dis-

abled, the instruction

²TABRDC [m]² reads the ROM

data as defined by TBLP and the current program

counter bits.

Stack Register

- STACK

This is a special part of the memory which is used to

save the contents of the program counter only. The

stack is organized into 8 levels and is neither part of the

data nor part of the program space, and is neither read-

able nor writeable. The activated level is indexed by the

stack pointer (SP) and is neither readable nor writeable.

At a subroutine call or interrupt acknowledge signal, the

contents of the program counter are pushed onto the

stack. At the end of a subroutine or an interrupt routine,

signaled by a return instruction (RET or RETI), the pro-

gram counter is restored to its previous value from the

stack. After a chip reset, the SP will point to the top of the

stack.

If the stack is full and a non-masked interrupt takes

place, the interrupt request flag will be recorded but the

acknowledge signal will be inhibited. When the stack

pointer is decremented (by RET or RETI), the interrupt

will be serviced. This feature prevents stack overflow al-

lowing the programmer to use the structure more easily.

In a similar case, if the stack is full and a

²CALL² is sub-

sequently executed, stack overflow occurs and the first

entry will be lost (only the most recent 8 return ad-

dresses are stored).

Data Memory

- RAM for Bank 0

The data memory is designed with 255

´8 bits. The

data memory is divided into two functional groups: spe-

cial function registers and general purpose data mem-

ory (224

´8). Most are read/write, but some are read

only.

The general purpose data memory, addressed from

20H to FFH, is used for data and control information

under instruction commands. All of the data memory

areas can handle arithmetic, logic, increment, decre-

ment and rotate operations directly. Except for some

dedicated bits, each bit in the data memory can be set

and reset by

²SET [m].i² and ²CLR [m].i². They are also

indirectly accessible through memory pointer registers

(MP0 or MP1).

Data Memory

- RAM for Bank 1

The special function registers used in USB interface are

located in RAM bank 1. In order to access the Bank1

be used and the Bank register BP should be set to

²1².

The mapping of RAM bank 1 is as shown.

G e n e r a l P u r p o s e

D a t a M e m o r y

( 2 2 4 B y t e s )

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

F F H

: U n u s e d

R e a d a s " 0 0 "

2 0 H

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

B P

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C

T M R 0

T M R 0 C

T M R 1 H

T M R 1 L

T M R 1 C

P A

P A C

P B

P B C

P C

P C C

P D

P D C

P E

P E C

U S C

U S R

S C C

T B H P

B a n k 0

Bank 0 RAM Mapping

U n d e f i n e d , r e s e r v e d

f o r f u t u r e e x p a n s i o n

P I P E _ C T R L

A W R

S T A L L

P I P E

S I E S

M I S C

E n d p t _ E N

F I F O 0

F I F O 1

F I F O 2

F I F O 3

4 0 H

4 1 H

4 2 H

4 3 H

4 4 H

4 5 H

4 6 H

4 7 H

4 8 H

4 9 H

4 A H

4 B H

4 C H

F F H

Bank 1 RAM Mapping

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