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CS4852 数据表(PDF) 11 Page - Cirrus Logic |
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CS4852 数据表(HTML) 11 Page - Cirrus Logic |
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11 / 23 page ![]() 11 DS734F5 5.6 Switching Characteristics—RESET 5.6 Switching Characteristics—RESET Figure 5-1. RESET Timing 5.7 Switching Characteristics—XTI Figure 5-2. XTI Timing 5.8 Switching Characteristics—Internal Clock Parameter Symbol Min Max Unit RESET# minimum pulse width low Trstl 1— ms All bidirectional pins high-Z after RESET# low Trst2z — 100 ns Configuration pins setup before RESET# high Trstsu 50 — ns Configuration pins hold after RESET# high Trsthld 20 — ns Parameter Symbol Min Max Unit External Crystal operating frequency1 1.Part characterized with the following crystal frequency values: 11.2896, 12.288, 18.432, 24.576, & 27 MH.z Fxtal 11.2896 27 MHz XTI period Tclki 33.3 100 ns XTI high time Tclkih 13.3 — ns XTI low time Tclkil 13.3 — ns External Crystal Load Capacitance (parallel resonant)2 2.CL refers to the total load capacitance as specified by the crystal manufacturer. Crystals that require a CL outside this range should be avoided. The crystal oscillator circuit design should follow the crystal manufacturer’s recommendation for load capacitor selection. CL 10 18 pF External Crystal Equivalent Series Resistance ESR — 50 Ω Parameter Symbol Min Max Unit Internal DCLK frequency1 Fdclk —— MHz CS4852x-CQZ CS4854x-CQZ CS4856x-CQZ CS4854x-DQZ CS4856x-DQZ Fxtal Fxtal Fxtal Fxtal Fxtal 150 150 150 150 150 RESET# Trst2z Trstl Trstsu Trsthld HS[3:0] All Bidirectional Pins t clkih t clkil Tclki XTI |
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