CDCV855, CDCV855I

2.5-V PHASE-LOCK LOOP CLOCK DRIVER

SCAS660A – SEPTEMBER 2001 – REVISED DECEMBER 2002

7

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

1

n = N

N

CLK

FBIN

CLK

∑

CLK

FBIN

CLK

FBIN

t(

φ) n

t(

φ) =

t(

φ) n

t(

φ) n+1

(N is a Large Number of Samples)

FBIN

t(

φ)

td(

φ)

td(

φ)

t(

φ)

td(

φ)

td(

φ)

(a) Static Phase Offset

(b) Dynamic Phase Offset

Figure 3. Phase Offset

Yx

Yx, FBOUT

Yx, FBOUT

Yx

tsk(o)

Figure 4. Output Skew