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IRCC 数据表(PDF) 40 Page - SMSC Corporation

部件名 IRCC
功能描述  INFRARED COMMUNICATIONS CONTROLLER
PDF  79 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

IRCC 数据表(HTML) 40 Page - SMSC Corporation

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ACE UART
The SMSC IrCC incorporates one full function
UART compatible with the NS16450, the 16450
ACE registers and the NS16550A. The UART
performs serial-to-parallel conversion on received
characters and parallel-to-serial conversion on
transmit characters.
The data rates are
independently programmable from 115.2K baud
down to 50 baud.
The character options are
programmable for 1 start; 1, 1.5 or 2 stop bits;
even, odd, sticky or no parity; and prioritized
interrupts. The UART contains a programmable
baud rate generator that is capable of dividing the
input clock or crystal by a number from 1 to 65535.
The UART is also capable of supporting the MIDI
data rate. Refer to the Configuration Register
section
of
the
SMSC
FDC37C669FR,
FDC37C93XFR, or FDC37C957FR data sheet for
information on disabling, power down and
changing the base address of the UART. The
interrupt
from
the
UART
is
enabled
by
programming OUT2 of the UART to a logic "1".
OUT2 being a logic "0" disables the UART's
interrupt.
REGISTER DESCRIPTION
Addressing of the accessible registers of the Serial
Port is shown below. The base addresses of the
serial ports are defined by the configuration
registers. The Serial Port registers are located at
sequentially increasing addresses above these
base addresses. The SMSC IrCC UART register
set is described below.
Table 27 - Addressing The Serial Port
DLAB*
A2
A1
A0
REGISTER NAME
0
0
0
0
Receive Buffer (read)
0
0
0
0
Transmit Buffer (write)
0
0
0
1
Interrupt Enable (read/write)
X
0
1
0
Interrupt Identification (read)
X
0
1
0
FIFO Control (write)
X
0
1
1
Line Control (read/write)
X
1
0
0
Modem Control (read/write)
X
1
0
1
Line Status (read/write)
X
1
1
0
Modem Status (read/write)
X
1
1
1
Scratchpad (read/write)
1
0
0
0
Divisor LSB (read/write)
1
0
0
1
Divisor MSB (read/write
*NOTE: DLAB is Bit 7 of the Line Control Register



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