HC652 datasheet(4/9 Pages) SLS

4 / 9 page

SL74HC652

System Logic

Semiconductor

SLS

AC ELECTRICAL CHARACTERISTICS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to

-55

°C

≤85°C

≤125°C

Unit

tPLH, tPHL

Maximum Propagation Delay, Input A to Output B

(or Input B to Output A)

(Figures 2,3 and 9)

2.0

4.5

6.0

180

225

270

tPLH, tPHL

Maximum Propagation Delay, A-to-B Clock to

Output B (or B-to-A Clock to Output A)

(Figures 1 and 9)

2.0

4.5

6.0

240

300

360

tPLH, tPHL

Maximum Propagation Delay, A-to-B Source to

Output B (or B-to-A Source to Output A) (Figures

4 and 9)

2.0

4.5

6.0

220

275

330

tPLZ, tPHZ

Maximum Propagation Delay , Direction or Output

Enable to Output A or B

(Figures 5,6 and 10)

2.0

4.5

6.0

170

215

255

tPZL, tPZH

Maximum Propagation Delay , Direction or Output

Enable to Output A or B

(Figures 5,6 and 10)

2.0

4.5

6.0

180

225

270

tTLH, tTHL

Maximum Output Transition Time, Any Output

(Figure 2)

2.0

4.5

6.0

CIN

Maximum Input Capacitance

COUT

Maximum Three-State I/O Capacitance

(Output in High-Impedance State

Power Dissipation Capacitance (Per Channel)

Typical @25

°C,V

CC=5.0 V

CPD

Used to determine the no-load dynamic power

consumption:

PD=CPDVCC

2f+I

CCVCC

HC652 数据表(PDF) 4 Page - System Logic Semiconductor

HC652 数据表(HTML) 4 Page - System Logic Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9

数据表下载

链接网址

HC652 数据表(PDF) 4 Page - System Logic Semiconductor

HC652 数据表(HTML) 4 Page - System Logic Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9

数据表 下载

链接网址

数据表下载