2 (10)

DA9138.005

12 April, 2006

PIN CONFIGURATION

PDIP 16

TSL

TMG

OSC

TXC*

CL1

CL2

XESR

VSS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16 VDD

RXC

RDI

RDO

XHST

XASY

TDO

TDI

TSL

TMG

OSC

TXC*

CL1

CL2

XESR

VSS

1

2

3

4

5

6

7

8

SO16

9

10

11

12

13

14

15

16 VDD

RXC

RDI

RDO

XHST

XASY

TDO

TDI

MAS9138N

MAS9138SB/SD

Top marking: YYWW = Year Week, XXXXX.X = Lot Number,

=ESD Indicator

PIN DESCRIPTION

Pin name

Pin no.

I/O

Function

PDIP

SO

TSL

1

1

I

Timing select. 0 selects external sampling timing 16 x TXC from pin 2,

TMG. 1 selects internal sampling timing.

TMG

2

2

I

Timing. Square wave timing signal 16 x TXC (TSL = 0) or 128 x

TXCmax (TSL = 1).

Max f = 10 Mhz when VDD = 5v and 5MHz when VDD = 3.3v.

OSC

3

3

O

Oscillator. Output for crystal. If used, the crystal is connected between

pins 2 and 3.

TXC

4

4

I

Transmitter timing (MAS9138 only).

Synchronous square wave timing for transmitter. The transmitted data

output, TDO is synchronized to the rising edge of TXC. The duty cycle

of TXC has to be 50% +/- 5%.

CL1

5

5

I

Character length. The total character length including one start bit, one

stop bit and possible parity bit is selected with the CL1 and CL2

signals.

CL2

6

6

I

XESR

7

7

I

Extended signalling rate. The tolerance of the synchronous bit rate can

be:

XESR = 1 (basic signalling rate) TXC -2.5%...+1.0%

XESR = 0 (extended signalling rate) TXC -2.5%...2.3%

VSS

8

8

G

Ground