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MAS9138ASB1 数据表(PDF) 5 Page - Micro Analog systems |
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MAS9138ASB1 数据表(HTML) 5 Page - Micro Analog systems |
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5 / 10 page ![]() 5 (10) DA9138.005 12 April, 2006 Data timing (test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC) Parameter Symbol Conditions Min Typ Max Unit Low to high logic transition time tR CL = 10pF 20 ns High to low logic transition time tR CL = 10 pF 20 ns (test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 1) Parameter Symbol Conditions Min Typ Max Unit TDO delay time after TXC T1 50 TTXC/16 + 350 ns RDI setup time before RXC T2 1/4 TRXC ns RDI hold time after RXC T3 1/4 TRXC ns (test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 0, TMG = 16xTXC) Parameter Symbol Conditions Min Typ Max Unit TDO delay time after TXC T1 50 1/TMG + 350 ns RDI setup time before RXC T2 1/4 TRXC ns RDI hold time after RXC T3 1/4 TRXC ns TIMING DIAGRAMS The MAS9138 shifts the data out with rising edge of TXC. The data from RDI is read in with falling edge of RXC. TRXC T2 T3 RXC RDI TXC TDO TTXC delay T1 |
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