AD7911/AD7921

Rev. 0 | Page 10 of 28

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

GND

8

7

6

5

DIN

1

SCLK

2

CS

3

DOUT

4

AD7911/

AD7921

8-LEAD TSOT

TOP VIEW

(Not to Scale)

Figure 8. 8-Lead TSOT Pin Configuration

GND

8

7

6

5

DOUT

1

CS

2

SCLK

3

DIN

4

AD7911/

AD7921

8-LEAD MSOP

TOP VIEW

(Not to Scale)

Figure 9. 8-Lead MSOP Pin Configuration

Table 5. Pin Function Descriptions

TSOT

Pin No.

MSOP

Pin No.

Mnemonic

Function

1

4

DIN

Data In. Logic input. The channel to be converted is provided on this input and is clocked into an

internal register on the falling edge of SCLK.

2

3

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock

input is also used as the clock source for the AD7911/AD7921’s conversion process.

3

2

CS

Chip Select. Active low logic input. This input provides the dual function of initiating conversions on

the AD7911/AD7921 and framing the serial data transfer.

4

1

DOUT

Data Out. Logic output. The conversion result from the AD7911/AD7921 is provided on this output as a

serial data stream. The bits are clocked out on the falling edge of the SCLK signal.

For the AD7921, the data stream consists of two leading zeros; the channel identifier bit, which

identifies the channel that the conversion result corresponds to; followed by an invalid bit that

matches up to the channel identifier bit; followed by the 12 bits of conversion data, with MSB first.

For the AD7911, the data stream consists of two leading zeros; the channel identifier bit, which

identifies the channel that the conversion result corresponds to; followed by an invalid bit that

matches up to the channel identifier bit; followed by the 10 bits of conversion data, with MSB first and

two trailing zeros.

5

8

6

7

GND

Analog Ground. Ground reference point for all circuitry on the AD7911/AD7921. All analog input

signals should be referred to this GND voltage.

7, 8

6, 5

Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip track-

and-hold amplifier. The analog input channel to be converted is selected by writing to the third MSB