| 数据搜索系统,热门电子元器件搜索 |
|
AD7921AUJ-R2 数据表(PDF) 20 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD7921AUJ-R2 数据表(HTML) 20 Page - Analog Devices |
|
20 / 28 page ![]() AD7911/AD7921 Rev. 0 | Page 20 of 28 POWER VS. THROUGHPUT RATE By using the power-down mode on the AD7911/AD7921 when not converting, the average power consumption of the ADC decreases at lower throughput rates. Figure 29 shows how, as the throughput rate is reduced, the device remains in its power- down state longer and the average power consumption over time drops accordingly. For example, if the AD7911/AD7921 are operating in a continuous sampling mode with a throughput rate of 50 kSPS and a SCLK of 5 MHz (VDD = 5 V) and the devices are placed in power-down mode between conversions, then the power consumption is calculated as follows. The power dissipation during normal operation is 20 mW (VDD = 5 V). If one dummy cycle powers up the part between conversions (3.2 µs), and the remaining conversion time is another cycle (3.2 µs), then the AD7911/AD7921 dissipate 20 mW for 6.4 µs during each conversion cycle. If the throughput rate is 50 kSPS and the cycle time is 20 µs, then the average power dissipated during each cycle is (6.4/20) × (20 mW) = 6.4 mW If VDD = 3 V, SCLK= 5 MHz, and the device is again in power- down mode between conversions, then the power dissipation during normal operation is 6 mW. The AD7911/AD7921 now dissipate 6 mW for 6.4 µs during each conversion cycle. With a throughput rate of 50 kSPS, the average power dissipated during each cycle is (6.4/20) × (6 mW) = 1.92 mW In the previous examples, the power dissipation when the part is in power-down mode has not been taken into account, because the shutdown current is so low that it does not have any effect on the overall power dissipation value. Figure 29 shows the power consumption versus throughput rate when using the power-down mode between conversions with both 5 V and 3 V supplies. Power-down mode is intended for use with throughput rates of approximately 120 kSPS and under, because higher sampling rates do not have a power saving in power-down mode. 0.01 100 10 1 0.1 0 135 120 105 90 75 60 45 30 15 THROUGHPUT (kSPS) VDD = 5V, SCLK = 5MHz VDD = 3V, SCLK = 5MHz Figure 29. Power Consumption vs. Throughput Rate |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |