CS61577 datasheet(32/44 Pages) CIRRUS

32 / 44 page

POWER SUPPLY

As shown on the evaluation board schematic in

Figure 1, power is supplied to the evaluation

board from an external +5 Volt supply connected

to the two binding posts labeled +5V and GND.

Transient suppressor D10 protects the compo-

nents on the board from over-voltage damage and

reversed supply connections. The recommended

power supply decoupling is provided by C1, C2

and C3. Ceramic capacitor C1 and electrolytic ca-

pacitor C2 are used to decouple RV+ to RGND.

Capacitor C3 decouples TV+ to TGND. The TV+

and RV+ power supply traces are connected at the

device socket U1. A ground plane on the compo-

nent side of the evaluation board insures optimum

performance.

BOARD CONFIGURATION

Pins on line interface device U1 with more than

one pin name have different functions depending

on the operating mode selected. Pin names not

enclosed in parenthesis or square brackets de-

scribe the Hardware mode pin function. Pin

names enclosed in parenthesis describe the Ex-

tended Hardware mode pin function. Pin names

enclosed in square brackets describe the Host

mode pin function.

Table 1 explains how to configure the evaluation

board jumpers depending on the device installed

and the desired operating mode. Mode selection

is accomplished with slide switch SW1 and jump-

e rs JP2, JP6, and JP7. The CS61535A,

CS61574A, CS61575, CS61577, CS61304A, and

CS61305A support the Hardware, Extended

Hardware, and Host operating modes. The

CS61534, CS61535, and CS61574 support the

Hardware and Host operating modes. The

CS6158 and CS6158A only support the Hardware

operating mode.

Hardware Mode

In the Hardware operating mode, the line inter-

face is configured using DIP switch S2. The digi-

tal control inputs to the device selected by S2 in-

clude: transmit all ones (TAOS), local loopback

(LLOOP), remote loopback (RLOOP), and trans-

mit line length selection (LEN2,LEN1,LEN0).

Closing a DIP switch on S2 towards the label sets

the device control pin of the same name to logic 1

(+5 Volts). Note that S2 switch positions TCODE

and RCODE have no function in Hardware mode.

In addition, the host processor interface connector

JP1 should not be used in the Hardware mode.

Two LED status indicators are provided in Hard-

ware mode. The LED labeled DPM (AIS) illumi-

nates when the line interface asserts the Driver

JUMPER

POSITION

FUNCTION SELECTED

JP1

Connector for external processor in Host operating mode.

JP2, JP6, JP7

A-A

Extended Hardware operating mode.

B-B

Hardware or Host operating modes.

JP3

Hardware or Extended Hardware operating modes.

OUT

Host operating mode.

JP4

C-C

Connects the ACLKI BNC input to pin 1 of device.

D-D

Grounds the ACLKI BNC input through 51

Ω resistor R1.

JP5

E-E

Transmit line connection for all applications except those listed for "F-F" on the next line.

F-F

Ω coax E1 applications using the Schott 12932/12532 or PE-65389/65566 at transformer T1.

JP8

Shorts resistor R2 for all applications except those listed for "OUT" on the next line.

OUT

Inserts resistor R2 for 75

Ω coax E1 applications using the CS61534, 35, 58, 74, or 77.

Table 1. Evaluation Board Jumper Settings

LINE INTERFACE EVALUATION BOARD

DS40DB3

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