AD6652PCB datasheet(39/76 Pages) AD

39 / 76 page

AD6652

Rev. 0 | Page 39 of 76

Bits 4 and 5 determine the output mo . Mode 00 sets the chip

up in fixed-point mode. The number f bits is determined by

l port configuration.

4. In this mode, an

(x is

Output Mode Formats

Format

Value

RCF OUTPUT SCALE FACTOR AND CONTROL

aspects of the RCF register. Use Bits 3–0 to set the scale of the

fixed-point output mode. This scale value can also be used to

set the floating-point outputs in conjunction with Bit 6 of this

the seria

Mo e 01 selects floating-point mode 8 +

8-bit mantissa is followed by a 4-bit exponent. In mode 1x

don’t care), the mode is 12 + 4, or 12-bit mantissa and 4-bi

exponent.

Table 17.

Floating Point 12 + 4

Floating Point 8 + 4

Fixed Point

Normally, the AD6652 determines the exponent value that

optimizes numerical accuracy. However, if Bit 6 is set, the value

stored in Bits 3–0 is used to scale the output. This ensures

consistent scaling and accuracy during conditions that might

warrant predictable output ranges. If Bits 3–0 are represented by

RCF scale, the scaling factor in dB is given by

)

(

log

)

(

−

Scale

RCF

Factor

Scaling

For an RCF scale of 0, the scaling factor is equal to −18.06 dB,

and for a maximum RCF scale of 15, the scaling factor is equal

to +72.25 dB.

If Bit 7 is set, the same exponent is used for both the real and

ry (I and Q) outputs. The exponent used is the one that

prevents numeric overflow at the expense of small signal

m a problem, because small

Bit 8 is the RCF bank select bit used to program the register.

noted that while the chip is computing filters,

put

el 1 can also be paired with Channel 0. This control bit is

652 channel operates in normal mode.

However, if Bit 10 is set, then the RCF is bypassed to Channel

BIST ee the User-Configurable Built-In Self-Test (BIST)

imagina

accuracy. However, this is seldo

numbers would represent 0 regardless of the exponent used.

When this bit is 0, the lowest block of 128 is selected (taps 0 to

127). When high, the highest block is selected (taps 128 to 255).

It should be

Tap 127 is adjacent to Tap 128 and there are no paging issues.

Bit 9 selects where the input to each RCF originates. If Bit 9 is

clear, then the RCF input comes from the CIC5 normally

associated with the RCF. However, if the bit is set, then the in

comes from CIC5 Channel 1. The only exception is Channel 1,

which uses the output of CIC5 Channel 0 as its alternate. Using

this feature, each RCF can either operate on its own channe

data or be paired with the RCF of Channel 1. The RCF of

Chann

used with polyphase distributed filtering.

If Bit 10 is clear, the AD6

. S

section for more details.

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