CS61577 datasheet(17/44 Pages) ETC

17 / 44 page

Writing a "1" to either "Clear LOS" or "Clear

DPM" over the serial interface has three effects:

1) The current interrupt on the serial interface

will be cleared. (Note that simply reading

the register bits will not clear the inter-

rupt).

2) Output data bits 5, 6 and 7 will be reset as

appropriate.

3) Future interrupts for the corresponding LOS

or DPM will be prevented from occurring.

Writing a "0" to either "Clear LOS" or "Clear

DPM" enables the corresponding interrupt for

LOS or DPM.

Input bits 5/6/7=111 and 5/6/7=101 are the same

request, and cause the line interface to enter into

the factory test mode. In other words, when

RLOOP=1 (Bit 5) and TAOS=1 (Bit 7), LOOP

(Bit 6) is a don’t care. For normal operation,

RLOOP and TAOS should not be simultaneously

selected via the serial interface.

Output data from the serial interface is presented

as shown in Tables 11 and 12. Bits 2, 3 and 4 can

be read to verify line length selection. Bits 5, 6

and 7 must be decoded. Codes 101, 110 and 111

(Bits 5, 6 and 7) indicate intermittent losses of

signal and/or driver problems.

SDO goes to a high impedance state when not in

use. SDO and SDI may be tied together in appli-

c at i ons where t he ho st p roce ssor ha s a

bi-directional I/O port.

Power On Reset / Reset

Upon power-up, the IC is held in a static state

until the supply crosses a threshold of approxi-

mately 3 Volts. When this threshold is crossed,

the device will delay for about 10 ms to allow the

power supply to reach operating voltage. After

this delay, calibration of the delay lines used in

the transmit and receive sections commences. The

delay lines can be calibrated only if a reference

clock is present. The reference clock for the re-

ceiver is provided by the crystal oscillator, or

ACLKI if the oscillator is disabled. The reference

clock for the transmitter is provided by TCLK.

The initial calibration should take less than

20 ms.

In operation, the delay lines are continuously cali-

brated, making the performance of the device

independent of power supply or temperature vari-

ations. The continuous calibration function

forgoes any requirement to reset the line interface

when in operation. However, a reset function is

available which will clear all registers.

In the Hardware and Extended Hardware Modes,

a reset request is made by simultaneously setting

both the RLOOP and LLOOP pins high for at

least 200 ns. Reset will initiate on the falling edge

of the reset request (falling edge of RLOOP and

LLOOP). In the Host Mode, a reset is initiated by

simultaneously writing RLOOP and LLOOP to

LSB: first bit in

LOS

Loss of Signal

DPM

Driver Performance Monitor

LEN0

Bit 0 - Line Length Select

LEN1

Bit 1 - Line Length Select

LEN2

Bit 2 - Line Lenght Select

Table 11. Output Data Bits 0 - 4

Bits

Status

56 7

0 0 0 Reset has occurred or no program input.

00 1 TAOS in effect.

0 1 0 LLOOP in effect.

0 1 1 TAOS/LLOOP in effect.

1 0 0 RLOOP in effect

1 0 1 DPM changed state since last "clear DPM"

occured.

1 1 0 LOS changed state since last "clear LOS"

occured.

1 1 1 LOS and DPM have changed state since

last "clear LOS" and "clear DPM".

Table 12. Coding for Serial Output bits 5,6,7

CS61577

DS155PP2

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