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P89LPC924 数据表(PDF) 18 Page - NXP Semiconductors |
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P89LPC924 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 49 page ![]() Philips Semiconductors P89LPC924/925 8-bit microcontrollers with accelerated two-clock 80C51 core Product data Rev. 03 — 15 December 2004 18 of 49 9397 750 14471 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 8.9 A/D converter 8.9.1 General description The P89LPC924/925 has an 8-bit, 4-channel multiplexed successive approximation analog-to-digital converter module. A block diagram of the A/D converter is shown in Figure 5. The A/D consists of a 4-input multiplexer which feeds a sample-and-hold circuit providing an input signal to one of two comparator inputs. The control logic in combination with the successive approximation register (SAR) drives a digital-to-analog converter which provides the other input to the comparator. The output of the comparator is fed to the SAR. Fig 5. ADC block diagram. + – COMP DAC1 SAR 8 INPUT MUX CONTROL LOGIC CCLK 002aaa791 |
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