2003 Jun 25

3

Philips Semiconductors

Product specification

Octal D-type transparent latch; 3-state

74ALVC573

FUNCTION TABLE

See note 1

Note

1. H = HIGH voltage level;

a) h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;

b) L = LOW voltage level;

c) l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;

d) Z = high-impedance OFF-state.

ORDERING INFORMATION

OPERATING MODES

INPUT

INTERNAL

LATCH

OUTPUT

OE

LE

Dn

Qn

Enable and read register

(transparent mode)

L

H

LLL

L

HHHH

Latch and read register

L

L

l

L

L

LLh

H

H

Latch register and disable

outputs

H

LlL

Z

HL

hH

Z

TYPE NUMBER

PACKAGE

TEMPERATURE

RANGE

PINS

PACKAGE

MATERIAL

CODE

74ALVC573D

−40 to +85 °C

20

SO20

plastic

SOT163-1

74ALVC573PW

−40 to +85 °C

20

TSSOP20

plastic

SOT360-1

74ALVC573BQ

−40 to +85 °C

20

DHVQFN20

plastic

SOT764-1

PINNING

PIN

SYMBOL

DESCRIPTION

1

OE

output enable input (active

LOW)

2

D0

data input

3

D1

data input

4

D2

data input

5

D3

data input

6

D4

data input

7

D5

data input

8

D6

data input

9

D7

data input

10

GND

ground (0 V)

11

LE

latch enable input (active

HIGH)

12

Q7

3-state latch output

13

Q6

3-state latch output

14

Q5

3-state latch output

15

Q4

3-state latch output

16

Q3

3-state latch output

17

Q2

3-state latch output

18

Q1

3-state latch output

19

Q0

3-state latch output

20

supply voltage

PIN

SYMBOL

DESCRIPTION