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ADT7320UCPZ-R2 数据表(PDF) 16 Page - Analog Devices |
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ADT7320UCPZ-R2 数据表(HTML) 16 Page - Analog Devices |
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16 / 25 page ![]() Data Sheet ADT7320 Rev. 0 | Page 15 of 24 TEMPERATURE VALUE REGISTER The temperature value register stores the temperature measured by the internal temperature sensor. The temperature is stored in a 16-bit, twos complement format. The temperature is read back from the temperature value register (Register Address 0x02) as a 16-bit value. Bit 2, Bit 1, and Bit 0 are event alarm flags for TCRIT, THIGH, and TLOW, respectively. When the ADC is configured to convert the temperature to a 16-bit digital value, Bit 2, Bit 1, and Bit 0 are no longer used as flag bits and are, instead, used as the LSB bits for the extended digital value. ID REGISTER This 8-bit read-only register (Register Address 0x03) stores the manufacturer ID in Bit 7 to Bit 3 and the silicon revision in Bit 2 to Bit 0. The default setting for the ID register is 0xC3. TCRIT SETPOINT REGISTER The 16-bit TCRIT setpoint register (Register Address 0x04) stores the critical overtemperature limit value. A critical overtemperature event occurs when the temperature value stored in the temperature value register exceeds the value stored in this register. The CT pin is activated if a critical overtemperature event occurs. The temperature is stored in twos complement format with the MSB being the temperature sign bit. The default setting for the TCRIT setpoint is 147°C. Table 9. Temperature Value Register (Register Address 0x02) Bit(s) Default Value Type Name Description [0] 0 R TLOW flag/LSB0 Flags a TLOW event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value is below TLOW, this bit is set to 1. Contains Least Significant Bit 0 of the 15-bit temperature value when the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). [1] 0 R THIGH flag/LSB1 Flags a THIGH event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value is above THIGH, this bit is set to 1. Contains Least Significant Bit 1 of the 15-bit temperature value when the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). [2] 0 R TCRIT flag/LSB2 Flags a TCRIT event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value exceeds TCRIT, this bit is set to 1. Contains the Least Significant Bit 2 of the 15-bit temperature value if the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). [7:3] 00000 R Temp Temperature value in twos complement format. [14:8] 0000000 R Temp Temperature value in twos complement format. 15 0 R Sign Sign bit; indicates if the temperature value is negative or positive. Table 10. ID Register (Register Address 0x03) Bit(s) Default Value Type Name Description [2:0] 011 R Revision ID Contains the silicon revision identification number. [7:3] 11000 R Manufacturer ID Contains the manufacturer identification number. Table 11. TCRIT Setpoint Register (Register Address 0x04) Bit(s) Default Value Type Name Description [15:0] 0x4980 R/W TCRIT 16-bit critical overtemperature limit, stored in twos complement format. |
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