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AD7277ARMZ 数据表(PDF) 5 Page - Analog Devices

部件名 AD7277ARMZ
功能描述  3 MSPS, 12-/10-/8-Bit ADCs in 6-Lead TSOT
PDF  28 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7277ARMZ 数据表(HTML) 5 Page - Analog Devices

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Data Sheet
AD7276/AD7277/AD7278
Rev. D | Page 5 of 28
AD7277 SPECIFICATIONS
VDD = 2.35 V to 3.6 V, fSCLK = 48 MHz, fSAMPLE = 3 MSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
A Grade1, 2
B Grade1,2
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
f
IN = 1 MHz sine wave
Signal-to-Noise + Distortion (SINAD)3
60.5
60.5
dB min
Total Harmonic Distortion (THD)3
−70
−1
dB max
−76
−76
dB typ
Peak Harmonic or Spurious Noise (SFDR)3
−80
−80
dB typ
Intermodulation Distortion (IMD)3
Second-Order Terms
−82
−82
dB typ
fa = 1 MHz, fb = 0.97 MHz
Third-Order Terms
−82
−82
dB typ
fa = 1 MHz, fb = 0.97 MHz
Aperture Delay
5
5
ns typ
Aperture Jitter
18
18
ps typ
Full Power Bandwidth
74
74
MHz typ
@ 3 dB
10
10
MHz typ
@ 0.1 dB
DC ACCURACY
Resolution
10
10
Bits
Integral Nonlinearity3
±0.5
±0.5
LSB max
Differential Nonlinearity3
±0.5
±0.5
LSB max
Guaranteed no missed codes to 10 bits
Offset Error3
±1.5
±1
LSB max
Gain Error3
±2
±1.5
LSB max
Total Unadjusted Error (TUE)3
±2.5
±2.5
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to V
DD
0 to V
DD
V
DC Leakage Current
±1
±1
µA max
−40°C to +85°C
±5.5
±5.5
µA max
85°C to 125°C
Input Capacitance
42
42
pF typ
When in track
10
10
pF typ
When in hold
LOGIC INPUTS
Input High Voltage, V
INH
1.7
1.7
V min
2.35 V ≤ V
DD ≤ 2.7 V
2
2
V min
2.7 V < V
DD ≤ 3.6 V
Input Low Voltage, V
INL
0.7
0.7
V max
2.35 V ≤ V
DD ≤ 2.7 V
0.8
0.8
V max
2.7 V < V
DD ≤ 3.6 V
Input Current, I
IN
±1
±1
µA max
Typically 10 nA, V
IN = 0 V or VDD
Input Capacitance, C
IN
4
2
2
pF typ
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD − 0.2
V
DD − 0.2
V min
I
SOURCE = 200 µA, VDD = 2.35 V to 3.6 V
Output Low Voltage, V
OL
0.2
0.2
V max
I
SINK = 200 µA
Floating-State Leakage Current
±2.5
±2.5
µA max
Floating-State Output Capacitance4
4.5
4.5
pF typ
Output Coding
Straight (natural) binary
CONVERSION RATE
Conversion Time
250
250
ns max
12 SCLK cycles with SCLK at 48 MHz
Track-and-Hold Acquisition Time3
60
60
ns min
Throughput Rate
3.45
3.45
MSPS max
SCLK at 48 MHz



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