AD7927 datasheet(21/29 Pages) AD

21 / 29 page

AD7927

Data Sheet

Rev. D | Page 20 of 28

AUTO SHUTDOWN (PM1 = 0, PM0 = 1)

In this mode, the AD7927 automatically enters shutdown at the

end of each conversion when the control register is updated.

When the part is in shutdown, the track-and-hold is in hold

mode. Figure 23 shows the general diagram of the operation

of the AD7927 in this mode. In shutdown mode all internal

circuitry on the AD7927 is powered down. The part retains

information in the control register during shutdown. The AD7927

remains in shutdown until the next CS falling edge it receives.

On this CS falling edge, the track-and-hold that was in hold

while the part was in shutdown returns to track. Wake-up time

from auto shutdown is 1 μs maximum, and the user should

ensure that 1 μs has elapsed before attempting a valid conversion.

When running the AD7927 with a 20 MHz clock, one dummy

16 SCLK transfer should be sufficient to ensure the part is fully

powered up. During this dummy transfer, the contents of the

control register should remain unchanged; therefore, the

WRITE bit should be 0 on the DIN line.

Depending on the SCLK frequency used, this dummy transfer

may affect the achievable throughput rate of the part, with every

other data transfer being a valid conversion result. If, for example,

the maximum SCLK frequency of 20 MHz was used, the auto

shutdown mode could be used at the full throughput rate of

200 kSPS without affecting the throughput rate at all. Only a

portion of the cycle time is taken up by the conversion time and

the dummy transfer for wake-up.

In this mode, the power consumption of the part is greatly

reduced with the part entering shutdown at the end of each

conversion. When the control register is programmed to move

into auto shutdown, it does so at the end of the conversion. The

user can move the ADC in and out of the low power state by

controlling the CS signal.

SCLK

DOUT

DIN

DUMMY CONVERSION

CHANNEL IDENTIFIER BITS + CONVERSION RESU LT

INVALID DATA

CHANNEL IDENTIFIER BITS + CONVERSION RESU LT

CONTROL REGISTER IS LOADED ON THE

FIRST 12 CLOCKS, PM1 = 0, PM0 = 1

CONTROL REGISTER SHOULD NOT

CHANGE, WRITE BIT = 0

TO KEEP PART IN THIS MODE, LOAD PM1 = 0, PM0 = 1

IN CONTROL REGISTER OR SET WRITE BIT = 0

DATA INTO CONTROL/SHADOW REGISTER

DATA IN TO CONTROL/SHADOW REGISTER

PART ENTERS SHUTDOWN ON CS

RISING EDGE AS PM1 = 0, PM0 = 1

PART BEGINS TO POWER UP

ON CS FALLING EDGE

PART IS FULLY

POWERED UP

PART ENTERS SHUTDOWN ON

CS RISING EDGE AS PM1 = 0, PM0 = 1

Figure 23. Auto Shutdown Mode Operation

AD7927 数据表(PDF) 21 Page - Analog Devices

AD7927 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

数据表下载