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LT6553IGN 数据表(PDF) 5 Page - Linear Technology |
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LT6553IGN 数据表(HTML) 5 Page - Linear Technology |
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5 / 8 page ![]() LT6553 5 6553i Power Supplies The LT6553 is optimized for ±5V supplies but can be operated on as little as ±2.25V or a single 4.5V supply and as much as ±6V or a single 12V supply. Internally, each supply is independent to improve channel isolation. Do not leave any supply pins disconnected or the part may not function correctly! Enable/Shutdown The LT6553 has a TTL compatible shutdown mode con- trolled by the EN pin and referenced to the DGND pin. If the amplifier will be enabled at all times, the EN pin can be connected directly to DGND. If the enable function is desired, either driving the pin above 2V or allowing the internal 46k pull-up resistor to pull the EN pin to the top rail will disable the amplifier. When disabled, the DC output impedance will rise to approximately 700 Ω through the internal feedback and gain resistors. Supply current into the amplifier in the disabled state will be primarily through V+ and approximately equal to (V+ – EN)/46k. It is important that the two following constraints on the DGND pin and the EN pin are always followed: V+ – VDGND ≥ 3V VEN – VDGND ≤ 5.5V Split supplies of ±3V to ±5.5V will satisfy these require- ments with DGND connected to 0V. In single supply applications above 5.5V, an additional resistor may be needed from the EN pin to DGND if the pin is ever allowed to float. For example, on a 12V single supply, a 33k resistor would protect the pin if it were allowed to float high while still allowing the internal pull- up resistor to disable the part. On dual ±2.25V supplies, connecting the EN and DGND pins to V– is the easiest way of ensuring that V+ – VDGND is more than 3V. The DGND pin should not be pulled above the EN pin since doing so will turn on an ESD protection diode. If the EN pin voltage is forced a diode drop below the DGND pin, current should be limited to 10mA or less. The enable/disable times of the LT6553 are fast when driven with a logic input. Turn on (from 50% EN input to 50% output) typically occurs in less than 50ns. Turn off is slower, but is nonetheless below 300ns. Input Considerations The LT6553 input voltage range is from V– + 1V to V+ – 1V. Therefore, on split supplies the LT6553 input range is always larger than the output swing. On a single positive supply, however, the input range limits the output low swing to 2V (1V multiplied by the internal gain of 2). The inputs can be driven beyond the point at which the output clips so long as input currents are limited to below ±10mA. Continuing to drive the input beyond the output limit can result in increased current drive and slightly increased swing, but will also increase supply current and may result in delays in transient response at larger levels of overdrive. Layout and Grounding It is imperative that care is taken in PCB layout in order to utilize the very high speed and very low crosstalk of the LT6553. Separate power and ground planes are highly recommended and trace lengths should be kept as short as possible. If input or output traces must be run over a distance of several centimeters, they should use a con- trolled impedance with matching series and shunt resis- tances (nominally 75 Ω) to maintain signal fidelity. Low ESL/ESR bypass capacitors should be placed as close to the positive and negative supply pins as possible. One 0.01 µFceramiccapacitorisrecommendedforbothV+and V–. Additional 470pF ceramic capacitors with minimal trace length on each supply pin will further improve AC and transient response as well as channel isolation. For high current drive and large-signal transient applications, addi- tional 1 µF to 10µF tantalums should be added. The small- est capacitors should be placed closest to the package. To maintain the LT6553’s channel isolation, it is beneficial to shield parallel input and output traces using a ground plane or power supply traces. Vias between topside and backside metal may be required to maintain a low induc- tance ground near the part where numerous traces con- verge. ESD Protection The LT6553 has reverse-biased ESD protection diodes on all relevant pins. If any pins are forced a diode drop above the positive supply or a diode drop below the negative supply, large currents may flow through these diodes. If the current is kept below 10mA, no damage to the devices will occur. APPLICATIO S I FOR ATIO |
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