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LT6553IGN 数据表(PDF) 6 Page - Linear Technology

部件名 LT6553IGN
功能描述  650MHz Gain of 2 Triple Video Amplifier
PDF  8 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT6553IGN 数据表(HTML) 6 Page - Linear Technology

  LT6553IGN Datasheet HTML 1Page - Linear Technology LT6553IGN Datasheet HTML 2Page - Linear Technology LT6553IGN Datasheet HTML 3Page - Linear Technology LT6553IGN Datasheet HTML 4Page - Linear Technology LT6553IGN Datasheet HTML 5Page - Linear Technology LT6553IGN Datasheet HTML 6Page - Linear Technology LT6553IGN Datasheet HTML 7Page - Linear Technology LT6553IGN Datasheet HTML 8Page - Linear Technology  
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LT6553
6
6553i
TYPICAL APPLICATIO
RGB Buffer Demo Board
The DC714 Demo Board illustrates optimal routing, by-
passing and termination using the LT6553 as an RGB
video buffer. The schematic is shown in Figure 1. All inputs
and outputs are routed to have a characteristic impedance
of 75
Ω and 75Ω shunt and series terminations are con-
nected as close to the part as possible. For ideal operation,
a 75
Ω shunt termination should be connected at the
output. The LT6553’s gain of 2 will compensate for the
resulting divider between the series and shunt termination
resistors.
A fourth signal trace is provided at the bottom of the
board with dimensions identical to the combined input
and output of the other channels. This trace can be used
for calibrating out the effects of electrical delay and
impedance mismatching and is not necessary in an end-
user application. Several jumpers and additional connec-
tors are also included to allow for testing of the enable
feature and single supply operation.
RGB Video Selector/Cable Driver
A video multiplexer can be implemented using the EN pins
of parallel LT6553s as shown in Figure 2. In this applica-
tion, all outputs are connected together and one LT6553 is
switched on while the other is switched off. A fast inverter
is used to ensure that only one set of R, G and B channels
is buffered at any time. As shown, the outputs are con-
nected before the 75
Ω series termination resistors in
order to reduce any DC attenuation that may result from
the non-infinite output impedance of the disabled LT6553.
Figure 1. DC714 Demo Board Schematic
V
V
J4
BANANA JACK
10
11
12
13
14
15
16
R6
75
R5
75
R4
75
R1
75
R2
75
R3
75
Z = 75
Z = 75
Z = 75
Z = 75
C1
4700pF
9
INB
AGND
ING
AGND
INR
DGND
EN
V
V+
V+
8
7
6
5
4
3
2
1
V
OUTB
V+
OUTG
V
OUTR
V+
V+
U1
LT6553CGN
6553 F01
C2
470pF
C3
4700pF
C4
10
µF, 16V
1210
J2
BANANA JACK
J9
5
1
OUTR
4
3
2
C5
470pF
DUAL
SINGLE
C6
1000pF
C7
470pF
C8
4700pF
C9
10
µF, 16V
1210
J10
5
J12
BNC
NOTE 5
BNC x3
5
1
CAL
4
3
2
1
OUTG
4
3
2
J11
5
1
OUTB
4
3
2
J8
BNC
5
1
J3
BANANA JACK
E3
AGND
E1
EN
E2
DGND
CAL
AGND
4
3
2
13
2
JP3
SUPPLY
ENABLE
EXT
3
1 2
JP1
CONTROL
J5
5
1
INR
4
3
2
J6
5
BNC
× 3
1
ING
4
3
2
J7
5
1
Z = 75
Z = 75
Z = 75
INB
4
3
2
AGND
FLOAT
3
1 2
JP2
DGND
J1
50
Ω BNC
EN
5432
1



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