AD8451 datasheet(20/33 Pages) AD

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Data Sheet

AD8451

When the ISREFH pin is tied to the VREF pin with the ISREFL

pin grounded, the voltage at the ISMEA pin is increased by 20 mV,

guaranteeing that the output of the IA is always positive for zero

differential inputs. Other voltage shifts can be realized by tying

the ISREFH pin to an external voltage source. The gain from the

ISREFH pin to the ISMEA pin is 8 mV/V. For zero offset, tie

the ISREFL and ISREFH pins to ground.

Battery Reversal and Overvoltage Protection

The AD8451 IA can be configured for high-side or low-side

current sensing. If the IA is configured for high-side current

sensing (see Figure 43) and the battery is connected backward,

the IA inputs may be held at a voltage that is below the negative

power rail (AVEE), depending on the battery voltage.

To prevent damage to the IA under these conditions, the IA

inputs include overvoltage protection circuitry that allows them

to be held at voltages of up to 55 V from the opposite power

rail. In other words, the safe voltage span for the IA inputs

extends from AVCC − 55 V to AVEE + 55 V.

DIFFERENCE AMPLIFIER (DA)

Figure 45 is a block diagram of the DA, which is used to monitor

the battery voltage. The architecture of the DA is a subtractor

amplifier with a fixed gain of 0.8. This gain value allows the DA to

funnel the voltage of a 5 V battery to a level that can be read by

a 5 V ADC with a 4.096 V reference.

BVREFL

BVP

BVN

100kΩ

50kΩ

80kΩ

79.9kΩ

–

BVREFH

VREF

BVMEA

Figure 45. DA Simplified Block Diagram

The resistors that form the DA gain network are laser trimmed

to a matching level better than ±0.1%. This level of matching

minimizes the gain error and gain error drift of the DA while

maximizing the CMRR of the DA. This matching also allows

the controller to set a stable target voltage for the battery over

temperature while rejecting the ground bounce in the battery

negative terminal.

Like the IA, the DA can also level shift its output voltage via an

internal resistor divider that is tied to the DA reference node. This

resistor divider is connected to the BVREFH and BVREFL pins.

When the BVREFH pin is tied to the VREF pin with the BVREFL

pin grounded, the voltage at the BVMEA pin is increased by 5 mV,

guaranteeing that the output of the DA is always positive for

zero differential inputs. Other voltage shifts can be realized by

tying the BVREFH pin to an external voltage source. The gain

from the BVREFH pin to the BVMEA pin is 2 mV/V. For zero

offset, tie the BVREFL and BVREFH pins to ground.

CC AND CV LOOP FILTER AMPLIFIERS

The CC and CV loop filter amplifiers are high precision, low

noise specialty amplifiers with very low offset voltage and very

low input bias current. These amplifiers serve two purposes:

•

Using external components, the amplifiers implement active

loop filters that set the dynamics (transfer function) of the

CC and CV loops.

•

The amplifiers perform a seamless transition from CC to

CV mode after the battery reaches its target voltage.

Figure 46 is the functional block diagram of the AD8451 CC

and CV feedback loops for charge mode (MODE logic pin is high).

For illustration purposes, the external networks connected to

the loop amplifiers are simple RC networks configured to form

single-pole inverting integrators. The outputs of the CC and CV

loop filter amplifiers are coupled to the VINT pins via an analog

NOR circuit (minimum output selector circuit), such that they can

only pull the VINT node down. In other words, the loop amplifier

that requires the lowest voltage at the VINT pins is in control of

the node. Thus, only one loop amplifier, CC or CV, can be in

control of the system charging control loop at any given time.

Rev. 0 | Page 19 of 32

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