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AD8451 数据表(PDF) 23 Page - Analog Devices |
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AD8451 数据表(HTML) 23 Page - Analog Devices |
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23 / 33 page ![]() AD8451 Data Sheet APPLICATIONS INFORMATION This section describes how to use the AD8451 in the context of a battery formation and test system. This section includes a design example of a small scale model of an actual system. FUNCTIONAL DESCRIPTION The AD8451 is a precision analog front end and controller for battery formation and test systems. These systems use precision controllers and power stages to put batteries through charge and discharge cycles. Figure 49 shows the signal path of a simplified switching battery formation and test system using the AD8451 controller and the ADP1972 PWM controller. For more information on the ADP1972, see the ADP1972 data sheet. The AD8451 is suitable for systems that form and test NiCad, NiMH, and Li-Ion batteries and is designed to operate in conjunction with both linear and switching power stages. The AD8451 includes the following blocks (see Figure 42 and the Theory of Operation section for more information). • A fixed gain IA that senses low-side or high-side battery current. • A fixed gain DA that measures the terminal voltage of the battery. • Two loop filter error amplifiers that receive the battery target current and voltage and establish the dynamics of the CC and CV feedback loops. • A minimum output selector circuit that combines the outputs of the loop filter error amplifiers to perform automatic CC to CV switching. • An output clamp amplifier that drives the VCTRL pin. The voltage range of this amplifier is limited by the voltage at the VCLP and VCLN pins such that it cannot overrange the subsequent stage. The output clamp amplifier can drive switching and linear power converters. Note that an increasing voltage at the VCTRL pin must translate to a larger output current in the power converter. • A 2.5 V reference whose output node is the VREF pin. A logic input pin (MODE) that changes the configuration of the controller from charge to discharge mode. A logic high at the MODE pin configures charge mode; a logic low configures discharge mode. BATTERY LEVEL SHIFTER VCTRL SENSE RESISTOR ISVP ISVN BVP BVN MODE SWITCHES (3) AVCC OUTPUT DRIVERS BATTERY CURRENT AVEE CV BUFFER CONSTANT CURRENT LOOP FILTER AMPLIFIER – + – + 1× VINT BUFFER VSET ISET C D C D C D VINT ISMEA BVMEA OUTPUT FILTER DA – + – + IA AD8451 CONTROLLER 1× SET BATTERY VOLTAGE SET BATTERY CURRENT DC-TO-DC POWER CONVERTER EXTERNAL PASSIVE COMPENSATION NETWORK C = CHARGE D = DISCHARGE CONSTANT VOLTAGE LOOP FILTER AMPLIFIER ADP1972 PWM Figure 49. Complete Signal Path of a Battery Test or Formation System Suitable for Li-Ion Batteries Rev. 0 | Page 22 of 32 |
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