PSD813F2 datasheet(53/110 Pages) STMICROELECTRONICS

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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2

MCU I/O Mode

In the MCU I/O mode, the MCU uses the I/O Ports

block to expand its own I/O ports. By setting up the

CSIOP space, the ports on the PSD are mapped

into the MCU address space. The addresses of

the ports are listed in Table 7., page 18.

A port pin can be put into MCU I/O mode by writing

a 0 to the corresponding bit in the Control Regis-

ter. The MCU I/O direction may be changed by

writing to the corresponding bit in the Direction

See

the

section

entitled

Peripheral

I/O

Mode, page 55. When the pin is configured as an

output, the content of the Data Out Register drives

the pin. When configured as an input, the MCU

can read the port input through the Data In buffer.

See Figure 26., page 52.

Ports C and D do not have Control Registers, and

are in MCU I/O mode by default. They can be used

for PLD I/O if equations are written for them in PS-

Dabel.

PLD I/O Mode

The PLD I/O Mode uses a port as an input to the

CPLD’s Input Macrocells (IMC), and/or as an out-

put from the CPLD’s Output Macrocells (OMC).

The output can be tri-stated with a control signal.

This output enable control signal can be defined

by a product term from the PLD, or by resetting the

corresponding bit in the Direction Register to ’0.’

The corresponding bit in the Direction Register

must not be set to '1' if the pin is defined for a PLD

input signal in PSDabel. The PLD I/O mode is

specified in PSDabel by declaring the port pins,

and then writing an equation assigning the PLD I/

O to a port.

Address Out Mode

For MCUs with a multiplexed address/data bus,

Address Out Mode can be used to drive latched

addresses on to the port pins. These port pins can,

in turn, drive external devices. Either the output

enable or the corresponding bits of both the Direc-

tion Register and Control Register must be set to

a 1 for pins to use Address Out Mode. This must

be done by the MCU at run-time. See Table 21 for

the address output pin assignments on Ports A

and B for various MCUs.

For non-multiplexed 8-bit bus mode, address sig-

nals (A7-A0) are available to Port B in Address Out

Mode.

Note: Do not drive address signals with Address

Out Mode to an external memory device if it is in-

tended for the MCU to Boot from the external de-

vice. The MCU must first Boot from PSD memory

so the Direction and Control register bits can be

set.

Table 19. Port Operating Modes

Note: 1. Can be multiplexed with other I/O functions.

Port Mode

Port A

Port B

Port C

Port D

MCU I/O

Yes

PLD I/O

McellAB Outputs

McellBC Outputs

Additional Ext. CS Outputs

PLD Inputs

Yes

Address Out

Yes (A7 – 0)

or (A15 – 8)

Address In

Yes

Data Port

Yes (D7 – 0)

Peripheral I/O

Yes

JTAG ISP

Yes1

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