AD8341

Rev. 0 | Page 14 of 20

following equation:

pF

0.5

nF

10

kHz

45

+

×

≈

FLT

C

0.1 µF (bandwidth settings of approximately 4.5 kHz to 43 MHz).

INTERFACING TO HIGH SPEED DACs

The AD977x family of dual DACs is well suited to driving the I

and Q vector controls of the AD8341. While these inputs can in

general be driven by any DAC, the differential outputs and bias

level of the ADI TxDAC® family allows for a direct connection

between DAC and modulator.

The AD977x family of dual DACs has differential current out-

puts. The full-scale current is user programmable and is usually

set to 20 mA, that is, each output swings from 0 mA to 20 mA.

The basic interface between the AD9777 DAC outputs and the

AD8341 I and Q inputs is shown in Figure 33. The Resistors R1

and R2 set the dc bias level according to the equation:

Bias Level = Average Output Current × R1

For example, if the full-scale current from each output is 20 mA,

each output will have an average current of 10 mA. Therefore to

set the bias level to the recommended 0.5 V, R1 and R2 should

be set to 50 Ω each. R1 and R2 should always be equal.

If R3 is omitted, this will result in an available swing from

the DAC of 2 V p-p differential, which is twice the maximum

voltage range required by the AD8341. DAC resolution can be

maximized by adding R3, which scales down this voltage

according to the following equation:

=

Swing

Scale

Full

()

()

⎥⎦

⎤

⎢⎣

⎡

+

−

×

+

×

R3

R2

R2

R3

R2

R1

1

||

2

OPTIONAL

LOW-PASS

FILTER

R1

R2

R3

QBBM

QBBP

IBBM

IBBP

AD9777

AD8341

OPTIONAL

LOW-PASS

FILTER

R1

R2

R3

Figure 33. Basic AD9777 to AD8341 Interface

(

Ω)

130

50 55 60 65 70 75 80 85 90

100 105

115 120

110

125

95

1.15

1.08

1.10

1.13

1.00

1.02

1.05

0.95

0.97

0.88

0.90

0.92

0.77

0.80

0.82

0.85

0.70

0.75

0.72

Figure 34. Peak-to-Peak DAC Output Swing vs.

Swing Scaling Resistor R3 (R1 = R2 = 50 Ω)

Figure 34 shows the relationship between the value of R3 and

the peak baseband voltage with R1 and R2 equal to 50 Ω.

From Figure 34, it can be seen that a value of 100 Ω for R3 will

provide a peak-to-peak swing of 1 V p-p differential into the

AD8341’s I and Q inputs.

When using a DAC, low-pass image reject filters are typically

used to eliminate the Nyquist images produced by the DAC.

They also provide the added benefit of eliminating broadband

noise that might feed into the modulator from the DAC.

CDMA2000 APPLICATION

To test the compliance to the CDMA2000 base station standard,

a single-carrier CDMA2000 test model signal (forward pilot,

sync, paging, and six traffic as per 3GPP2 C.S0010-B, Table

6.5.2.1) was applied to the AD8341 at 1960 MHz. A cavity tuned

filter was used to reduce noise from the signal source being

applied to the device. The 6.8 MHz pass band of this filter is

apparent in the subsequent spectral plots.

Figure 35 shows a plot of the spectrum of the output signal

Noise and distortion is measured in a 1 MHz bandwidth at

±2.25 MHz carrier offset (30 kHz measurement bandwidth).