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Issue A

ML145053

LANSDALE Semiconductor, Inc.

DESCRIPTION

This example application of the ML145053 ADC interfaces

four analog signals to a microprocessor.

Figure 15 illustrates how the ML145053 is used as a cost

effective means to simplify this type of circuit design. Utilizing

one ADC, four analog inputs are interfaced to a CMOS or

NMOS microprocessor with a serial peripheral interface (SPI)

port. Processors with National Semiconductor's MICROWIRE

serial port may also be used. Full duplex operation optimizes

throughput for this system.

DIGITAL DESIGN CONSIDERATIONS

Motorola's MC68HC05C4 CMOS MCU may be chosen to

reduce power supply size and cost. The NMOS MCUs may be

used if power consumption is not critical. A VDD or VSS 0.1

µF bypass capacitor should be closely mounted to the ADC.

The ML145053 has the end-of-conversion (EOC) signal at

output pin 1 to define when data is ready.

ANALOG DESIGN CONSIDERATIONS

Analog signal sources with output impedances of less than

1 kΩ may be directly interfaced to the ADC, eliminating the

need for buffer amplifiers. Separate lines connect the Vref and

VAG pins on the ADC with the controllers to provide isolation

from system noise.

Although not indicated in Figure 15, the Vref and sensor out-

put lines may need to be shielded, depending on their length

and electrical environment. This should be verified during pro-

totyping with an oscilloscope. If shielding is required, a twist-

ed pair or foil-shielded wire (not coax) is appropriate for this

low frequency application. One wire of the pair or the shield

must be VAG.

A reference circuit voltage of 5 volts is used for the applica-

tion shown in Figure 15. However, the reference circuitry may

be simplified by tying VAG to system ground and Vref to the

system's positive supply. (See Figure 16.)

A bypass capacitor of approximately 0.22 µF across theVref

and VAG pins is recommended. These pins are adjacent on the

ADC package which facilitates mounting the capacitor very

close to the ADC.

SOFTWARE CONSIDERATIONS

The software flow for acquisition is straight forward. The

four analog inputs, AN0 through AN3, are scanned by reading

the analog value of the previously addressed channel into the

MCU and sending the address of the next channel to be read to

the ADC, simultaneously.

The designer utilizing the ML145053 has the end-of-con-

version signal (at pin 1) to define the conversion interval. EOC

may be used to generate an interrupt, which is serviced by

reading the serial data from the ADC. The software flow

should then process and format the data.

When this ADC is used with a 16-bit (2-byte) transfer, there

are two types of offsets involved. In the first type of offset, the

channel information sent to the ADCs is offset by 12 bits. That

is, in the 16-bit stream, only the first 4 bits (4 MSBs) contain

the channel information. The balance of the bits are don't

cares. This results in 3 don't-care nibbles, as shown in Table 2.

The second type of offset is in the conversion result returned

from the ADC; this is offset by 6 bits. In the 16-bitstream, the

first 10 bits (10 MSBs) contain the conversion result. The last

6 bits are zeroes. The hexadecimal result is shown in the first

column of Table 3. The second column shows the result after

the offset is removed by a micro-processor routine. If the 16-

bit format is used, the ADC can transfer one continuous 16-bit

stream or two intermittent 8-bitstreams.

Legacy Applications Information